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author | Cyril Chemparathy <cyril@ti.com> | 2010-03-25 17:43:47 -0400 |
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committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-05-06 15:02:04 -0700 |
commit | 52958be3ad6e2b72a5943718f339ed4e11685739 (patch) | |
tree | dcb17c4491930a31f98701e2e2879877780908d3 /arch/arm/mach-davinci/clock.h | |
parent | 449ef7f6a9c732657938b222f8804d3e34a3603e (diff) | |
download | talos-op-linux-52958be3ad6e2b72a5943718f339ed4e11685739.tar.gz talos-op-linux-52958be3ad6e2b72a5943718f339ed4e11685739.zip |
Davinci: support LPSC SwRstDisable state
The current clock control code always gates the clock (PSC state Disable = 2)
on clk_disable(). Some on-chip peripherals (e.g. LCD controller on TNETV107X)
need to be put into SwRstDisable = 0 on clock disable, to maintain
hardware sanity.
This patch extends the davinci_psc_config() arguments to pass in the desired
module state instead of a boolean enable/disable. Further, clk_disable() now
checks for the PSC_SWRSTDISABLE clk flag before selecting the target state.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/clock.h')
-rw-r--r-- | arch/arm/mach-davinci/clock.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index aa0a61150325..53a0f7b90119 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -101,10 +101,11 @@ struct clk { /* Clock flags: SoC-specific flags start at BIT(16) */ #define ALWAYS_ENABLED BIT(1) -#define CLK_PSC BIT(2) -#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ +#define CLK_PSC BIT(2) +#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ #define CLK_PLL BIT(4) /* PLL-derived clock */ -#define PRE_PLL BIT(5) /* source is before PLL mult/div */ +#define PRE_PLL BIT(5) /* source is before PLL mult/div */ +#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ #define CLK(dev, con, ck) \ { \ |