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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-04-23 22:12:57 +0800 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-28 15:07:28 +0000 |
commit | 8c3583b634d5705d8f604c0d9392bc273d19c256 (patch) | |
tree | fa2c010c4dbea580526cb91a25ae0e57abc0f099 /arch/arm/mach-at91/soc.h | |
parent | 1ff5b1b411bf8a8157ae949a1b3ed8666d96c1db (diff) | |
download | talos-op-linux-8c3583b634d5705d8f604c0d9392bc273d19c256.tar.gz talos-op-linux-8c3583b634d5705d8f604c0d9392bc273d19c256.zip |
at91: use structure to store the current soc
instead of reading the registers everytime
the current implementation respect the following constrain:
- allow 1 to n soc to be enabled
- allow to have a virtual cpu type and subtype
- always detect the cpu type and subtype and report it
- detect if the soc support is enabled
- prepare for sysfs export support
- drop soc specific code via compiler when the soc not enabled
(via cpu_is_xxx)
Today if we read the exid we will have the same value for 9g35 and 9m11
and we will need to check the cidr too
with the new implementation we just need to check the soc subtype
this will also allow to have specific virtual subtype for rm9200 which the
board will have to specify via at91rm9200_set_type(int) as we have no way to
detect it.
this implementation is inspired by the SH cpu detection support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/soc.h')
-rw-r--r-- | arch/arm/mach-at91/soc.h | 57 |
1 files changed, 47 insertions, 10 deletions
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 99afa7c90d65..9de7be4037c4 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h @@ -4,18 +4,55 @@ * Under GPLv2 */ -struct at91_soc { +struct at91_init_soc { unsigned int *default_irq_priority; void (*map_io)(void); void (*init)(unsigned long main_clock); }; -extern struct at91_soc at91_boot_soc; -extern struct at91_soc at91cap9_soc; -extern struct at91_soc at91rm9200_soc; -extern struct at91_soc at91sam9260_soc; -extern struct at91_soc at91sam9261_soc; -extern struct at91_soc at91sam9263_soc; -extern struct at91_soc at91sam9g45_soc; -extern struct at91_soc at91sam9rl_soc; -extern struct at91_soc at91sam9x5_soc; +extern struct at91_init_soc at91_boot_soc; +extern struct at91_init_soc at91cap9_soc; +extern struct at91_init_soc at91rm9200_soc; +extern struct at91_init_soc at91sam9260_soc; +extern struct at91_init_soc at91sam9261_soc; +extern struct at91_init_soc at91sam9263_soc; +extern struct at91_init_soc at91sam9g45_soc; +extern struct at91_init_soc at91sam9rl_soc; +extern struct at91_init_soc at91sam9x5_soc; + +static inline int at91_soc_is_enabled(void) +{ + return at91_boot_soc.init != NULL; +} + +#if !defined(CONFIG_ARCH_AT91CAP9) +#define at91cap9_soc at91_boot_soc +#endif + +#if !defined(CONFIG_ARCH_AT91RM9200) +#define at91rm9200_soc at91_boot_soc +#endif + +#if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)) +#define at91sam9260_soc at91_boot_soc +#endif + +#if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)) +#define at91sam9261_soc at91_boot_soc +#endif + +#if !defined(CONFIG_ARCH_AT91SAM9263) +#define at91sam9263_soc at91_boot_soc +#endif + +#if !defined(CONFIG_ARCH_AT91SAM9G45) +#define at91sam9g45_soc at91_boot_soc +#endif + +#if !defined(CONFIG_ARCH_AT91SAM9RL) +#define at91sam9rl_soc at91_boot_soc +#endif + +#if !defined(CONFIG_ARCH_AT91SAM9X5) +#define at91sam9x5_soc at91_boot_soc +#endif |