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authorCatalin Marinas <catalin.marinas@arm.com>2009-07-24 12:32:52 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2009-07-24 12:32:52 +0100
commit88987ef91b99cf99bc5d167caeb31d4958fbf931 (patch)
tree95557c2fe408ad98d9547025ae98b0d0c1377aa2 /arch/arm/kernel
parent4be3bd7849165e7efa6b0b35a23d6a3598d97465 (diff)
downloadtalos-op-linux-88987ef91b99cf99bc5d167caeb31d4958fbf931.tar.gz
talos-op-linux-88987ef91b99cf99bc5d167caeb31d4958fbf931.zip
Thumb-2: Add some .align statements to the .S files
Since the Thumb-2 instructions can be 16-bit wide, data in the .text sections may not be aligned to a 32-bit word and this leads to unaligned exceptions. This patch does not affect the ARM code generation. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/entry-armv.S4
-rw-r--r--arch/arm/kernel/head-common.S2
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index fc8af43c5000..0befd1cabf45 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -1065,6 +1065,10 @@ vector_\name:
ldr lr, [pc, lr, lsl #2]
movs pc, lr @ branch to handler in SVC mode
ENDPROC(vector_\name)
+
+ .align 2
+ @ handler addresses follow this label
+1:
.endm
.globl __stubs_start
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 991952c644d1..dbfaef07a1f4 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -14,6 +14,7 @@
#define ATAG_CORE 0x54410001
#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
+ .align 2
.type __switch_data, %object
__switch_data:
.long __mmap_switched
@@ -185,6 +186,7 @@ ENDPROC(lookup_processor_type)
* Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for
* more information about the __proc_info and __arch_info structures.
*/
+ .align 2
.long __proc_info_begin
.long __proc_info_end
3: .long .
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