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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-05 08:51:38 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 19:21:47 +0000 |
| commit | 7627dc802a98aebebc6a34e5b6558ea4717c968c (patch) | |
| tree | f1308e351f6f003a52b5939b7eece82f14a12c62 /arch/arm/include | |
| parent | bef8f9ee32511a28f1c9a7d3b8c51cdac030b564 (diff) | |
| download | talos-op-linux-7627dc802a98aebebc6a34e5b6558ea4717c968c.tar.gz talos-op-linux-7627dc802a98aebebc6a34e5b6558ea4717c968c.zip | |
ARM: GIC: private a standard get_irqnr_preamble assembler macro
Provide a standard get_irqnr_preamble assembler macro for platforms
to use, which retrieves the base address of the GIC CPU interface
from gic_cpu_base_addr. Allow platforms to override this by defining
HAVE_GET_IRQNR_PREAMBLE.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/hardware/entry-macro-gic.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S index 05587f125a13..c115b82fe80a 100644 --- a/arch/arm/include/asm/hardware/entry-macro-gic.S +++ b/arch/arm/include/asm/hardware/entry-macro-gic.S @@ -10,6 +10,13 @@ #include <asm/hardware/gic.h> +#ifndef HAVE_GET_IRQNR_PREAMBLE + .macro get_irqnr_preamble, base, tmp + ldr \base, =gic_cpu_base_addr + ldr \base, [\base] + .endm +#endif + /* * The interrupt numbering scheme is defined in the * interrupt controller spec. To wit: |
