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| author | Catalin Marinas <catalin.marinas@arm.com> | 2011-11-28 21:57:24 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2012-04-17 15:29:44 +0100 |
| commit | b9d4d42ad901cc848ac87f1cb8923fded3645568 (patch) | |
| tree | 37c2010e12eecb605720b4c5d41780fcba282937 /arch/arm/include/asm/mmu.h | |
| parent | e323969ccda2d69f02e047c08b03faa09215c72a (diff) | |
| download | talos-op-linux-b9d4d42ad901cc848ac87f1cb8923fded3645568.tar.gz talos-op-linux-b9d4d42ad901cc848ac87f1cb8923fded3645568.zip | |
ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on pre-ARMv6 CPUs
This patch removes the __ARCH_WANT_INTERRUPTS_ON_CTXSW definition for
ARMv5 and earlier processors. On such processors, the context switch
requires a full cache flush. To avoid high interrupt latencies, this
patch defers the mm switching to the post-lock switch hook if the
interrupts are disabled.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Frank Rowand <frank.rowand@am.sony.com>
Tested-by: Marc Zyngier <Marc.Zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include/asm/mmu.h')
| -rw-r--r-- | arch/arm/include/asm/mmu.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h index 20b43d6f23b3..14965658a923 100644 --- a/arch/arm/include/asm/mmu.h +++ b/arch/arm/include/asm/mmu.h @@ -34,13 +34,4 @@ typedef struct { #endif -/* - * switch_mm() may do a full cache flush over the context switch, - * so enable interrupts over the context switch to avoid high - * latency. - */ -#ifndef CONFIG_CPU_HAS_ASID -#define __ARCH_WANT_INTERRUPTS_ON_CTXSW -#endif - #endif |
