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authorDave Airlie <airlied@redhat.com>2012-05-02 09:21:50 +0100
committerDave Airlie <airlied@redhat.com>2012-05-02 09:22:29 +0100
commit5bc69bf9aeb73547cad8e1ce683a103fe9728282 (patch)
treed3ef275532fc4391cb645f8b4d45d39d7fbb73f4 /arch/arm/common
parentc6543a6e64ad8e456674a1c4a01dd024e38b665f (diff)
parenta85d4bcb8a0cd5b3c754f98ff91ef2b9b3a73bc5 (diff)
downloadtalos-op-linux-5bc69bf9aeb73547cad8e1ce683a103fe9728282.tar.gz
talos-op-linux-5bc69bf9aeb73547cad8e1ce683a103fe9728282.zip
Merge tag 'drm-intel-next-2012-04-23' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next
Daniel Vetter writes: A new drm-intel-next pull. Highlights: - More gmbus patches from Daniel Kurtz, I think gmbus is now ready, all known issues fixed. - Fencing cleanup and pipelined fencing removal from Chris. - rc6 residency interface from Ben, useful for powertop. - Cleanups and code reorg around the ringbuffer code (Ben&me). - Use hw semaphores in the pageflip code from Ben. - More vlv stuff from Jesse, unfortunately his vlv cpu is doa, so less merged than I've hoped for - we still have the unused function warning :( - More hsw patches from Eugeni, again, not yet enabled fully. - intel_pm.c refactoring from Eugeni. - Ironlake sprite support from Chris. - And various smaller improvements/fixes all over the place. Note that this pull request also contains a backmerge of -rc3 to sort out a few things in -next. I've also had to frob the shortlog a bit to exclude anything that -rc3 brings in with this pull. Regression wise we have a few strange bugs going on, but for all of them closer inspection revealed that they've been pre-existing, just now slightly more likely to be hit. And for most of them we have a patch already. Otherwise QA has not reported any regressions, and I'm also not aware of anything bad happening in 3.4. * tag 'drm-intel-next-2012-04-23' of git://people.freedesktop.org/~danvet/drm-intel: (420 commits) drm/i915: rc6 residency (fix the fix) drm/i915/tv: fix open-coded ARRAY_SIZE. drm/i915: invalidate render cache on gen2 drm/i915: Silence the change of LVDS sync polarity drm/i915: add generic power management initialization drm/i915: move clock gating functionality into intel_pm module drm/i915: move emon functionality into intel_pm module drm/i915: move drps, rps and rc6-related functions to intel_pm drm/i915: fix line breaks in intel_pm drm/i915: move watermarks settings into intel_pm module drm/i915: move fbc-related functionality into intel_pm module drm/i915: Refactor get_fence() to use the common fence writing routine drm/i915: Refactor fence clearing to use the common fence writing routine drm/i915: Refactor put_fence() to use the common fence writing routine drm/i915: Prepare to consolidate fence writing drm/i915: Remove the unsightly "optimisation" from flush_fence() drm/i915: Simplify fence finding drm/i915: Discard the unused obj->last_fenced_ring drm/i915: Remove unused ring->setup_seqno drm/i915: Remove fence pipelining ...
Diffstat (limited to 'arch/arm/common')
-rw-r--r--arch/arm/common/vic.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 7a66311f3066..7e288f96cedf 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -427,19 +427,18 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
/*
* Handle each interrupt in a single VIC. Returns non-zero if we've
- * handled at least one interrupt. This does a single read of the
- * status register and handles all interrupts in order from LSB first.
+ * handled at least one interrupt. This reads the status register
+ * before handling each interrupt, which is necessary given that
+ * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
*/
static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
{
u32 stat, irq;
int handled = 0;
- stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
- while (stat) {
+ while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
irq = ffs(stat) - 1;
handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
- stat &= ~(1 << irq);
handled = 1;
}
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