diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-01-06 23:09:14 +0000 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-06 23:09:14 +0000 |
commit | e067096c8d57d191f29d734cd5692695c95cc36e (patch) | |
tree | e1c200404c3ed3730d04837113d59ca898eb483a /arch/arm/boot/dts/tegra-trimslice.dts | |
parent | 1fc3eb81100c3f3cd44e706e54390151b0f1ce74 (diff) | |
parent | e5570bbc9c06634cfac94e06ac1432b53d8595e5 (diff) | |
download | talos-op-linux-e067096c8d57d191f29d734cd5692695c95cc36e.tar.gz talos-op-linux-e067096c8d57d191f29d734cd5692695c95cc36e.zip |
Merge branch 'tegra/soc' into next/boards
Conflicts:
arch/arm/mach-tegra/board-harmony-pcie.c
To fix an internal merge conflict between the tegra/soc and tegra/boards
branches.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/tegra-trimslice.dts')
-rw-r--r-- | arch/arm/boot/dts/tegra-trimslice.dts | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts new file mode 100644 index 000000000000..3b3ee7db99f3 --- /dev/null +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -0,0 +1,65 @@ +/dts-v1/; + +/include/ "tegra20.dtsi" + +/ { + model = "Compulab TrimSlice board"; + compatible = "compulab,trimslice", "nvidia,tegra20"; + + memory@0 { + reg = < 0x00000000 0x40000000 >; + }; + + i2c@7000c000 { + clock-frequency = <400000>; + }; + + i2c@7000c400 { + clock-frequency = <400000>; + }; + + i2c@7000c500 { + clock-frequency = <400000>; + }; + + i2c@7000d000 { + status = "disable"; + }; + + serial@70006000 { + clock-frequency = < 216000000 >; + }; + + serial@70006040 { + status = "disable"; + }; + + serial@70006200 { + status = "disable"; + }; + + serial@70006300 { + status = "disable"; + }; + + serial@70006400 { + status = "disable"; + }; + + sdhci@c8000000 { + status = "disable"; + }; + + sdhci@c8000200 { + status = "disable"; + }; + + sdhci@c8000400 { + status = "disable"; + }; + + sdhci@c8000600 { + cd-gpios = <&gpio 121 0>; + wp-gpios = <&gpio 122 0>; + }; +}; |