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authorAnson Huang <b20788@freescale.com>2013-05-31 17:01:54 -0400
committerShawn Guo <shawn.guo@linaro.org>2013-06-03 13:47:12 +0800
commita08b9bc586a7810cdebbc316d5cbaed56a2a04a9 (patch)
tree4acb676c9a07b153f3f202cd7f1d782273b5ee86 /arch/arm/boot/dts/imx51.dtsi
parent37523dc5ec2fead0eb5235fd9334f0419013a1f2 (diff)
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ARM: imx: clk-imx6q: AXI clock select index is incorrect
The AXI clock mux should be as below: 00: periph; 01: pll2_pfd2_396m; 10: periph; 11: pll3_pfd1_540m; Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51.dtsi')
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