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| author | Vineet Gupta <vgupta@synopsys.com> | 2013-01-28 15:07:31 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2013-02-15 23:16:19 +0530 |
| commit | d626f547dd0457ab36f6151673fcc78fc3c63eaa (patch) | |
| tree | c9ccac3168a7201a97fc50c765dfb7a4bd234a83 /arch/arc/mm | |
| parent | db8e35d5b28fe6608e73913c919e4a6568f7c09c (diff) | |
| download | talos-op-linux-d626f547dd0457ab36f6151673fcc78fc3c63eaa.tar.gz talos-op-linux-d626f547dd0457ab36f6151673fcc78fc3c63eaa.zip | |
ARC: Don't fiddle with non-existent caches
!CONFIG_ARC_HAS_(I|D)CACHE makes Linux disable caches (assuming they
exist in hardware) - mostly for debugging issues with new peripherals.
However, independent of CONFIG_ARC_HAS_(I|D)CACHE, Linux also needs to
handle, non-existant caches, using the information in Cache BCRs (Build
Configuration Reg)
Reported-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm')
| -rw-r--r-- | arch/arc/mm/cache_arc700.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c index c299b30924ee..88d617d84234 100644 --- a/arch/arc/mm/cache_arc700.c +++ b/arch/arc/mm/cache_arc700.c @@ -144,23 +144,18 @@ void __init read_decode_cache_bcr(void) void __init arc_cache_init(void) { unsigned int temp; -#ifdef CONFIG_ARC_CACHE unsigned int cpu = smp_processor_id(); -#endif -#ifdef CONFIG_ARC_HAS_ICACHE - struct cpuinfo_arc_cache *ic; -#endif -#ifdef CONFIG_ARC_HAS_DCACHE - struct cpuinfo_arc_cache *dc; -#endif + struct cpuinfo_arc_cache *ic = &cpuinfo_arc700[cpu].icache; + struct cpuinfo_arc_cache *dc = &cpuinfo_arc700[cpu].dcache; int way_pg_ratio = way_pg_ratio; char str[256]; printk(arc_cache_mumbojumbo(0, str, sizeof(str))); -#ifdef CONFIG_ARC_HAS_ICACHE - ic = &cpuinfo_arc700[cpu].icache; + if (!ic->ver) + goto chk_dc; +#ifdef CONFIG_ARC_HAS_ICACHE /* 1. Confirm some of I-cache params which Linux assumes */ if ((ic->assoc != ARC_ICACHE_WAYS) || (ic->line_len != ARC_ICACHE_LINE_LEN)) { @@ -213,9 +208,11 @@ void __init arc_cache_init(void) write_aux_reg(ARC_REG_IC_CTRL, temp); -#ifdef CONFIG_ARC_HAS_DCACHE - dc = &cpuinfo_arc700[cpu].dcache; +chk_dc: + if (!dc->ver) + return; +#ifdef CONFIG_ARC_HAS_DCACHE if ((dc->assoc != ARC_DCACHE_WAYS) || (dc->line_len != ARC_DCACHE_LINE_LEN)) { panic("Cache H/W doesn't match kernel Config"); |
