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author | Vineet Gupta <vgupta@synopsys.com> | 2015-02-02 19:23:21 +0530 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2015-06-19 18:09:30 +0530 |
commit | 8d0d56ba24d8d0b04bc9d9a7fbd1796d8966159f (patch) | |
tree | 87dd235d9d6c2931e543bea091d5e47417a773a4 /arch/arc/kernel/devtree.c | |
parent | 556cc1c5f528dcc87733920de17d61b6ebe8999d (diff) | |
download | talos-op-linux-8d0d56ba24d8d0b04bc9d9a7fbd1796d8966159f.tar.gz talos-op-linux-8d0d56ba24d8d0b04bc9d9a7fbd1796d8966159f.zip |
ARC: [axs101] support early 8250 uart
Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC
"BASE_BAUD" is calculated dynamically in runtime, basically it is an
alias to arc_early_base_baud(), which in turn just does
"arc_base_baud/16".
8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in
"arc_base_baud" with this change.
Additional compatibility string "snps,arc-sdp" is introduced as well
because there're different flavours of AXS boards but they all share the
same motherboard and so it's possible to re-use the same code for
motherbord even if CPU daughterboard changes.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel/devtree.c')
-rw-r--r-- | arch/arc/kernel/devtree.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c index e32b54abff51..f801d46dc087 100644 --- a/arch/arc/kernel/devtree.c +++ b/arch/arc/kernel/devtree.c @@ -32,6 +32,8 @@ static void __init arc_set_early_base_baud(unsigned long dt_root) if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x")) arc_base_baud = core_clk/3; + else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp")) + arc_base_baud = 33333333; /* Fixed 33MHz clk */ else arc_base_baud = core_clk; } |