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authorVineet Gupta <vgupta@synopsys.com>2013-05-14 13:28:17 +0530
committerVineet Gupta <vgupta@synopsys.com>2013-06-22 13:46:42 +0530
commitda1677b02d3ef674dfd8a4ba1ed32153dc717fa2 (patch)
tree109d07ee350a94a85f9447af3f488623f989b6fa /arch/arc/include/asm/cache.h
parent18437347b976b81e616a57fb36922a240e71a6de (diff)
downloadtalos-op-linux-da1677b02d3ef674dfd8a4ba1ed32153dc717fa2.tar.gz
talos-op-linux-da1677b02d3ef674dfd8a4ba1ed32153dc717fa2.zip
ARC: Disintegrate arcregs.h
* Move the various sub-system defines/types into relevant files/functions (reduces compilation time) * move CPU specific stuff out of asm/tlb.h into asm/mmu.h Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/cache.h')
-rw-r--r--arch/arc/include/asm/cache.h19
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 2fe8e41a551c..44eb07eb92e5 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -9,8 +9,6 @@
#ifndef __ARC_ASM_CACHE_H
#define __ARC_ASM_CACHE_H
-#include <asm/mmu.h> /* some of cache registers depend on MMU ver */
-
/* In case $$ not config, setup a dummy number for rest of kernel */
#ifndef CONFIG_ARC_CACHE_LINE_SHIFT
#define L1_CACHE_SHIFT 6
@@ -36,6 +34,13 @@
#define is_not_cache_aligned(p) ((unsigned long)p & (~DCACHE_LINE_MASK))
#endif
+/*
+ * ARC700 doesn't cache any access in top 256M.
+ * Ideal for wiring memory mapped peripherals as we don't need to do
+ * explicit uncached accesses (LD.di/ST.di) hence more portable drivers
+ */
+#define ARC_UNCACHED_ADDR_SPACE 0xc0000000
+
#ifndef __ASSEMBLY__
/* Uncached access macros */
@@ -59,16 +64,10 @@
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
-/*
- * ARC700 doesn't cache any access in top 256M.
- * Ideal for wiring memory mapped peripherals as we don't need to do
- * explicit uncached accesses (LD.di/ST.di) hence more portable drivers
- */
-#define ARC_UNCACHED_ADDR_SPACE 0xc0000000
-
extern void arc_cache_init(void);
extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
extern void __init read_decode_cache_bcr(void);
-#endif
+
+#endif /* !__ASSEMBLY__ */
#endif /* _ASM_CACHE_H */
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