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authorMasanari Iida <standby24x7@gmail.com>2015-07-31 09:37:29 -0600
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-08-05 13:30:16 -0700
commitf8b66fe52d3ae97df9f2eef6410bd5aef095914c (patch)
tree17a9bbd3ae0f738a6592de7122269aa30e4aa7ce /Documentation/trace
parentf67b467aab10685f695190d2f471221e7a314374 (diff)
downloadtalos-op-linux-f8b66fe52d3ae97df9f2eef6410bd5aef095914c.tar.gz
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Doc: trace: Fix typo in coresight.txt
This patch fix spelling typos found in coresight.txt Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/trace')
-rw-r--r--Documentation/trace/coresight.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/trace/coresight.txt b/Documentation/trace/coresight.txt
index 77d14d51a670..0a5c3290e732 100644
--- a/Documentation/trace/coresight.txt
+++ b/Documentation/trace/coresight.txt
@@ -15,7 +15,7 @@ HW assisted tracing is becoming increasingly useful when dealing with systems
that have many SoCs and other components like GPU and DMA engines. ARM has
developed a HW assisted tracing solution by means of different components, each
being added to a design at synthesis time to cater to specific tracing needs.
-Compoments are generally categorised as source, link and sinks and are
+Components are generally categorised as source, link and sinks and are
(usually) discovered using the AMBA bus.
"Sources" generate a compressed stream representing the processor instruction
@@ -138,7 +138,7 @@ void coresight_unregister(struct coresight_device *csdev);
The registering function is taking a "struct coresight_device *csdev" and
register the device with the core framework. The unregister function takes
-a reference to a "strut coresight_device", obtained at registration time.
+a reference to a "struct coresight_device", obtained at registration time.
If everything goes well during the registration process the new devices will
show up under /sys/bus/coresight/devices, as showns here for a TC2 platform:
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