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authorOlof Johansson <olof@lixom.net>2013-12-26 11:03:29 -0800
committerOlof Johansson <olof@lixom.net>2013-12-26 11:03:29 -0800
commit770039fef4887d22b12525b62cc4ade1ca724173 (patch)
tree7408ae2a4dbe6a3b36af36976a04a968d951d6af /Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
parent954e198eac14f6c34157bbf053149f3c2917cbbd (diff)
parent8a0a1af30cbf56b41220a02e34835022c4d72f41 (diff)
downloadtalos-op-linux-770039fef4887d22b12525b62cc4ade1ca724173.tar.gz
talos-op-linux-770039fef4887d22b12525b62cc4ade1ca724173.zip
Merge branch 'tegra/dma-reset-rework' into next/dt
Bringing in the tegra dma/reset framework cleanup as a base for the DT changes. * tegra/dma-reset-rework: (320 commits) spi: tegra: checking for ERR_PTR instead of NULL ASoC: tegra: update module reset list for Tegra124 clk: tegra: remove bogus PCIE_XCLK clk: tegra: remove legacy reset APIs ARM: tegra: remove legacy DMA entries from DT ARM: tegra: remove legacy clock entries from DT USB: EHCI: tegra: use reset framework Input: tegra-kbc - use reset framework serial: tegra: convert to standard DMA DT bindings serial: tegra: use reset framework spi: tegra: convert to standard DMA DT bindings spi: tegra: use reset framework staging: nvec: use reset framework i2c: tegra: use reset framework ASoC: tegra: convert to standard DMA DT bindings ASoC: tegra: allocate AHUB FIFO during probe() not startup() ASoC: tegra: call pm_runtime APIs around register accesses ASoC: tegra: use reset framework dma: tegra: register as an OF DMA controller dma: tegra: use reset framework ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
index fcfed5bf73fb..6c5901b503d0 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
@@ -15,6 +15,9 @@ Required properties :
In clock consumers, this cell represents the clock ID exposed by the
CAR. The assignments may be found in header file
<dt-bindings/clock/tegra20-car.h>.
+- #reset-cells : Should be 1.
+ In clock consumers, this cell represents the bit number in the CAR's
+ array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
Example SoC include file:
@@ -23,6 +26,7 @@ Example SoC include file:
compatible = "nvidia,tegra20-car";
reg = <0x60006000 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
usb@c5004000 {
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