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| author | Olof Johansson <olof@lixom.net> | 2015-01-29 13:52:52 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-01-29 13:52:52 -0800 |
| commit | d073d7a1460ae1ae56a81bbb0a58d6f17917ca51 (patch) | |
| tree | 03a554995f61bd8f12d3508eae58011e0a6067e3 /Documentation/arm | |
| parent | 03773a4c177ab55a1e58bacef96f07d6074c26bd (diff) | |
| parent | d50b9e2e788dce9b120b5ac1140f0cdd1bf905eb (diff) | |
| download | talos-op-linux-d073d7a1460ae1ae56a81bbb0a58d6f17917ca51.tar.gz talos-op-linux-d073d7a1460ae1ae56a81bbb0a58d6f17917ca51.zip | |
Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.20" from Kukjin Kim:
- remove i2c sys configuration from mach-exynos/
: all related codes moved into i2c driver
- remove Samsung specific DMA
: every Samsung stuff uses dmaengine APIs
* tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: remove unused DMA infrastructure
ARM: EXYNOS: Remove i2c sys configuration related code
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/arm')
| -rw-r--r-- | Documentation/arm/Samsung-S3C24XX/DMA.txt | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/DMA.txt b/Documentation/arm/Samsung-S3C24XX/DMA.txt deleted file mode 100644 index 3ed82383efea..000000000000 --- a/Documentation/arm/Samsung-S3C24XX/DMA.txt +++ /dev/null @@ -1,46 +0,0 @@ - S3C2410 DMA - =========== - -Introduction ------------- - - The kernel provides an interface to manage DMA transfers - using the DMA channels in the CPU, so that the central - duty of managing channel mappings, and programming the - channel generators is in one place. - - -DMA Channel Ordering --------------------- - - Many of the range do not have connections for the DMA - channels to all sources, which means that some devices - have a restricted number of channels that can be used. - - To allow flexibility for each CPU type and board, the - DMA code can be given a DMA ordering structure which - allows the order of channel search to be specified, as - well as allowing the prohibition of certain claims. - - struct s3c24xx_dma_order has a list of channels, and - each channel within has a slot for a list of DMA - channel numbers. The slots are searched in order for - the presence of a DMA channel number with DMA_CH_VALID - or-ed in. - - If the order has the flag DMA_CH_NEVER set, then after - checking the channel list, the system will return no - found channel, thus denying the request. - - A board support file can call s3c24xx_dma_order_set() - to register a complete ordering set. The routine will - copy the data, so the original can be discarded with - __initdata. - - -Authour -------- - -Ben Dooks, -Copyright (c) 2007 Ben Dooks, Simtec Electronics -Licensed under the GPL v2 |
