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authorAnton Vorontsov <cbouatmailru@gmail.com>2008-07-30 02:05:23 +0400
committerAnton Vorontsov <cbouatmailru@gmail.com>2008-07-30 02:05:23 +0400
commit9fec6060d9e48ed7db0dac0e16d0f0f0e615b7f6 (patch)
tree74b41f31a08f6500ff3dfcf64ba21e2d9a8e87e5 /Documentation/DMA-attributes.txt
parentfece418418f51e92dd7e67e17c5e3fe5a28d3279 (diff)
parent6e86841d05f371b5b9b86ce76c02aaee83352298 (diff)
downloadtalos-op-linux-9fec6060d9e48ed7db0dac0e16d0f0f0e615b7f6.tar.gz
talos-op-linux-9fec6060d9e48ed7db0dac0e16d0f0f0e615b7f6.zip
Merge branch 'master' of /home/cbou/linux-2.6
Conflicts: drivers/power/Kconfig drivers/power/Makefile
Diffstat (limited to 'Documentation/DMA-attributes.txt')
-rw-r--r--Documentation/DMA-attributes.txt9
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index 6d772f84b477..b768cc0e402b 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -22,3 +22,12 @@ ready and available in memory. The DMA of the "completion indication"
could race with data DMA. Mapping the memory used for completion
indications with DMA_ATTR_WRITE_BARRIER would prevent the race.
+DMA_ATTR_WEAK_ORDERING
+----------------------
+
+DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
+may be weakly ordered, that is that reads and writes may pass each other.
+
+Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
+those that do not will simply ignore the attribute and exhibit default
+behavior.
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