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| author | Stephen Boyd <sboyd@codeaurora.org> | 2012-09-05 12:28:51 -0700 |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2012-09-13 11:14:29 -0700 |
| commit | 66a8950949c12a2600ff62e78b24f42ef8f6d28e (patch) | |
| tree | c348c8ba6bf082bafaa44e390f3129ce2dd45b4c /Documentation/DMA-ISA-LPC.txt | |
| parent | e8ea1ea90bfd90d3047924b77a3f76cf2147ada1 (diff) | |
| download | talos-op-linux-66a8950949c12a2600ff62e78b24f42ef8f6d28e.tar.gz talos-op-linux-66a8950949c12a2600ff62e78b24f42ef8f6d28e.zip | |
ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the
PPIs to be edge triggered. Now that we have the percpu irq
interface we don't need this code so let's remove it and update
the percpu irq user (msm_timer) to set the irq type.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'Documentation/DMA-ISA-LPC.txt')
0 files changed, 0 insertions, 0 deletions
