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author | Olof Johansson <olof@lixom.net> | 2013-04-17 23:37:36 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2013-04-17 23:37:53 -0700 |
commit | 981c448014557d6f9d7289567137c38adddd94e5 (patch) | |
tree | 3f24f8662b9f51e3de0ce17e3bfcb6c88a51d6ec | |
parent | 31880c37c11e28cb81c70757e38392b42e695dc6 (diff) | |
parent | 5ec69017cc944f3ed88362d4b60818713a45e616 (diff) | |
download | talos-op-linux-981c448014557d6f9d7289567137c38adddd94e5.tar.gz talos-op-linux-981c448014557d6f9d7289567137c38adddd94e5.zip |
Merge tag 'irqchip-3.10' of git://git.infradead.org/users/jcooper/linux into late/cleanup
From Jason Cooper:
mvebu driver irqchip for v3.10
- move the armada irqchip driver to drivers/irqchip/
* tag 'irqchip-3.10' of git://git.infradead.org/users/jcooper/linux:
irqchip: armada-370-xp: slightly cleanup irq controller driver
irqchip: armada-370-xp: move IRQ handler to avoid forward declaration
irqchip: move IRQ driver for Armada 370/XP
ARM: mvebu: move L2 cache initialization in init_early()
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/mach-mvebu/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/armada-370-xp.c | 9 | ||||
-rw-r--r-- | drivers/irqchip/Makefile | 1 | ||||
-rw-r--r-- | drivers/irqchip/irq-armada-370-xp.c (renamed from arch/arm/mach-mvebu/irq-armada-370-xp.c) | 106 |
4 files changed, 60 insertions, 58 deletions
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index da93bcbc74c1..c3be068f1c96 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -5,6 +5,6 @@ AFLAGS_coherency_ll.o := -Wa,-march=armv7-a obj-y += system-controller.o obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o -obj-$(CONFIG_ARCH_MVEBU) += addr-map.o coherency.o coherency_ll.o pmsu.o irq-armada-370-xp.o +obj-$(CONFIG_ARCH_MVEBU) += addr-map.o coherency.o coherency_ll.o pmsu.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index a5ea616d6d12..433e8c5343b2 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -19,6 +19,8 @@ #include <linux/time-armada-370-xp.h> #include <linux/clk/mvebu.h> #include <linux/dma-mapping.h> +#include <linux/irqchip.h> +#include <asm/hardware/cache-l2x0.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -54,6 +56,10 @@ void __init armada_370_xp_init_early(void) * to make sure such the allocations won't fail. */ init_dma_coherent_pool_size(SZ_1M); + +#ifdef CONFIG_CACHE_L2X0 + l2x0_of_init(0, ~0UL); +#endif } static void __init armada_370_xp_dt_init(void) @@ -72,8 +78,7 @@ DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)") .init_machine = armada_370_xp_dt_init, .map_io = armada_370_xp_map_io, .init_early = armada_370_xp_init_early, - .init_irq = armada_370_xp_init_irq, - .handle_irq = armada_370_xp_handle_irq, + .init_irq = irqchip_init, .init_time = armada_370_xp_timer_and_clk_init, .restart = mvebu_restart, .dt_compat = armada_370_xp_dt_compat, diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 98e3b87bdf1b..dae27a77c1e1 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o +obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o obj-$(CONFIG_METAG) += irq-metag-ext.o obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi.o diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 6a9195e10579..ad1e6422a732 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -25,7 +25,9 @@ #include <asm/mach/arch.h> #include <asm/exception.h> #include <asm/smp_plat.h> -#include <asm/hardware/cache-l2x0.h> +#include <asm/mach/irq.h> + +#include "irqchip.h" /* Interrupt Controller Registers Map */ #define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) @@ -46,7 +48,9 @@ #define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5) -#define ACTIVE_DOORBELLS (8) +#define IPI_DOORBELL_START (0) +#define IPI_DOORBELL_END (8) +#define IPI_DOORBELL_MASK 0xFF static DEFINE_RAW_SPINLOCK(irq_controller_lock); @@ -190,7 +194,7 @@ void armada_xp_mpic_smp_cpu_init(void) writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); /* Enable first 8 IPIs */ - writel((1 << ACTIVE_DOORBELLS) - 1, per_cpu_int_base + + writel(IPI_DOORBELL_MASK, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); /* Unmask IPI interrupt */ @@ -203,46 +207,8 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = { .xlate = irq_domain_xlate_onecell, }; -static int __init armada_370_xp_mpic_of_init(struct device_node *node, - struct device_node *parent) -{ - u32 control; - - main_int_base = of_iomap(node, 0); - per_cpu_int_base = of_iomap(node, 1); - - BUG_ON(!main_int_base); - BUG_ON(!per_cpu_int_base); - - control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); - - armada_370_xp_mpic_domain = - irq_domain_add_linear(node, (control >> 2) & 0x3ff, - &armada_370_xp_mpic_irq_ops, NULL); - - if (!armada_370_xp_mpic_domain) - panic("Unable to add Armada_370_Xp MPIC irq domain (DT)\n"); - - irq_set_default_host(armada_370_xp_mpic_domain); - -#ifdef CONFIG_SMP - armada_xp_mpic_smp_cpu_init(); - - /* - * Set the default affinity from all CPUs to the boot cpu. - * This is required since the MPIC doesn't limit several CPUs - * from acknowledging the same interrupt. - */ - cpumask_clear(irq_default_affinity); - cpumask_set_cpu(smp_processor_id(), irq_default_affinity); - -#endif - - return 0; -} - -asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs - *regs) +static asmlinkage void __exception_irq_entry +armada_370_xp_handle_irq(struct pt_regs *regs) { u32 irqstat, irqnr; @@ -267,13 +233,14 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs ipimask = readl_relaxed(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS) - & 0xFF; + & IPI_DOORBELL_MASK; - writel(0x0, per_cpu_int_base + + writel(~IPI_DOORBELL_MASK, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); /* Handle all pending doorbells */ - for (ipinr = 0; ipinr < ACTIVE_DOORBELLS; ipinr++) { + for (ipinr = IPI_DOORBELL_START; + ipinr < IPI_DOORBELL_END; ipinr++) { if (ipimask & (0x1 << ipinr)) handle_IPI(ipinr, regs); } @@ -284,15 +251,44 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs } while (1); } -static const struct of_device_id mpic_of_match[] __initconst = { - {.compatible = "marvell,mpic", .data = armada_370_xp_mpic_of_init}, - {}, -}; - -void __init armada_370_xp_init_irq(void) +static int __init armada_370_xp_mpic_of_init(struct device_node *node, + struct device_node *parent) { - of_irq_init(mpic_of_match); -#ifdef CONFIG_CACHE_L2X0 - l2x0_of_init(0, ~0UL); + u32 control; + + main_int_base = of_iomap(node, 0); + per_cpu_int_base = of_iomap(node, 1); + + BUG_ON(!main_int_base); + BUG_ON(!per_cpu_int_base); + + control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); + + armada_370_xp_mpic_domain = + irq_domain_add_linear(node, (control >> 2) & 0x3ff, + &armada_370_xp_mpic_irq_ops, NULL); + + if (!armada_370_xp_mpic_domain) + panic("Unable to add Armada_370_Xp MPIC irq domain (DT)\n"); + + irq_set_default_host(armada_370_xp_mpic_domain); + +#ifdef CONFIG_SMP + armada_xp_mpic_smp_cpu_init(); + + /* + * Set the default affinity from all CPUs to the boot cpu. + * This is required since the MPIC doesn't limit several CPUs + * from acknowledging the same interrupt. + */ + cpumask_clear(irq_default_affinity); + cpumask_set_cpu(smp_processor_id(), irq_default_affinity); + #endif + + set_handle_irq(armada_370_xp_handle_irq); + + return 0; } + +IRQCHIP_DECLARE(armada_370_xp_mpic, "marvell,mpic", armada_370_xp_mpic_of_init); |