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author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2014-04-24 11:30:01 -0400 |
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committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2014-05-05 18:11:13 -0400 |
commit | 8febcaa2aac184d7e729acb75e9c4b80b04ad1b9 (patch) | |
tree | dc67484f4b629e5edfbac0850c2a18ac00a7fdf4 | |
parent | c9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff) | |
download | talos-op-linux-8febcaa2aac184d7e729acb75e9c4b80b04ad1b9.tar.gz talos-op-linux-8febcaa2aac184d7e729acb75e9c4b80b04ad1b9.zip |
device: introduce per device dma_pfn_offset
On few architectures, there are few restrictions on DMAble area of system
RAM. That also means that devices needs to know about this restrictions so
that the dma_masks can be updated accordingly and dma address translation
helpers can add/subtract the dma offset.
In most of cases DMA addresses can be performed using offset value of
Bus address space relatively to physical address space as following:
PFN->DMA: __pfn_to_phys(pfn + [-]dma_pfn_offset)
DMA->PFN: __phys_to_pfn(dma_addr) + [-]dma_pfn_offset
So we introduce per device dma_pfn_offset which can be popullated
by architecture init code while creating the devices.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-rw-r--r-- | include/linux/device.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/device.h b/include/linux/device.h index 233bbbeb768d..85a52d698f78 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -691,6 +691,7 @@ struct acpi_dev_node { * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all * hardware supports 64-bit addresses for consistent allocations * such descriptors. + * @dma_pfn_offset: offset of DMA memory range relatively of RAM * @dma_parms: A low level driver may set these to teach IOMMU code about * segment limitations. * @dma_pools: Dma pools (if dma'ble device). @@ -756,6 +757,7 @@ struct device { not all hardware supports 64 bit addresses for consistent allocations such descriptors. */ + unsigned long dma_pfn_offset; struct device_dma_parameters *dma_parms; |