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authorMichal Simek <michal.simek@xilinx.com>2013-11-26 15:41:31 +0100
committerMichal Simek <michal.simek@xilinx.com>2014-02-10 11:20:54 +0100
commit016f4dcae81e842a2b7dbfbc0fc9257f9f16e785 (patch)
tree8f8ba77ad9ae0d0c1636af037e35f2ab4fdba6d1
parent6f69c7f21ce89409ccc54bd596434fa61d5b26ff (diff)
downloadtalos-op-linux-016f4dcae81e842a2b7dbfbc0fc9257f9f16e785.tar.gz
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ARM: zynq: Split slcr in two parts
Split the slcr into an early part for unlocking and cpu starting and a later syscon driver. Also add "syscon" compatible property for slcr. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi2
-rw-r--r--arch/arm/mach-zynq/Kconfig1
-rw-r--r--arch/arm/mach-zynq/common.c4
-rw-r--r--arch/arm/mach-zynq/common.h1
-rw-r--r--arch/arm/mach-zynq/slcr.c26
5 files changed, 30 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 93d1980a755d..81e5677f25a2 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -123,7 +123,7 @@
} ;
slcr: slcr@f8000000 {
- compatible = "xlnx,zynq-slcr";
+ compatible = "xlnx,zynq-slcr", "syscon";
reg = <0xF8000000 0x1000>;
clocks {
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index 6b04260aa142..323e5053cb9f 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -14,5 +14,6 @@ config ARCH_ZYNQ
select SPARSE_IRQ
select CADENCE_TTC_TIMER
select ARM_GLOBAL_TIMER
+ select MFD_SYSCON
help
Support for Xilinx Zynq ARM Cortex A9 Platform
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index bf6717f5cd3c..38401cf78383 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -59,11 +59,13 @@ static void __init zynq_init_machine(void)
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
platform_device_register(&zynq_cpuidle_device);
+
+ zynq_slcr_init();
}
static void __init zynq_timer_init(void)
{
- zynq_slcr_init();
+ zynq_early_slcr_init();
zynq_clock_init(zynq_slcr_base);
clocksource_of_init();
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index c22c92cea8cb..1548b85b56ad 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -20,6 +20,7 @@
void zynq_secondary_startup(void);
extern int zynq_slcr_init(void);
+extern int zynq_early_slcr_init(void);
extern void zynq_slcr_system_reset(void);
extern void zynq_slcr_cpu_stop(int cpu);
extern void zynq_slcr_cpu_start(int cpu);
diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
index 59ad09ff3bc0..899f97925729 100644
--- a/arch/arm/mach-zynq/slcr.c
+++ b/arch/arm/mach-zynq/slcr.c
@@ -15,7 +15,9 @@
*/
#include <linux/io.h>
+#include <linux/mfd/syscon.h>
#include <linux/of_address.h>
+#include <linux/regmap.h>
#include <linux/clk/zynq.h>
#include "common.h"
@@ -30,6 +32,7 @@
#define SLCR_A9_CPU_RST 0x1
void __iomem *zynq_slcr_base;
+static struct regmap *zynq_slcr_regmap;
/**
* zynq_slcr_system_reset - Reset the entire system.
@@ -80,13 +83,32 @@ void zynq_slcr_cpu_stop(int cpu)
}
/**
- * zynq_slcr_init
- * Returns 0 on success, negative errno otherwise.
+ * zynq_slcr_init - Regular slcr driver init
+ *
+ * Return: 0 on success, negative errno otherwise.
*
* Called early during boot from platform code to remap SLCR area.
*/
int __init zynq_slcr_init(void)
{
+ zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr");
+ if (IS_ERR(zynq_slcr_regmap)) {
+ pr_err("%s: failed to find zynq-slcr\n", __func__);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+/**
+ * zynq_early_slcr_init - Early slcr init function
+ *
+ * Return: 0 on success, negative errno otherwise.
+ *
+ * Called very early during boot from platform code to unlock SLCR.
+ */
+int __init zynq_early_slcr_init(void)
+{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
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