<feed xmlns='http://www.w3.org/2005/Atom'>
<title>talos-op-linux/include/asm-powerpc/system.h, branch v3.1-rc9</title>
<subtitle>Talos™ II Linux sources for OpenPOWER</subtitle>
<id>https://git.raptorcs.com/git/talos-op-linux/atom?h=v3.1-rc9</id>
<link rel='self' href='https://git.raptorcs.com/git/talos-op-linux/atom?h=v3.1-rc9'/>
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<updated>2008-08-04T02:02:00+00:00</updated>
<entry>
<title>powerpc: Move include files to arch/powerpc/include/asm</title>
<updated>2008-08-04T02:02:00+00:00</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2008-08-01T05:20:30+00:00</published>
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<id>urn:sha1:b8b572e1015f81b4e748417be2629dfe51ab99f9</id>
<content type='text'>
from include/asm-powerpc.  This is the result of a

mkdir arch/powerpc/include/asm
git mv include/asm-powerpc/* arch/powerpc/include/asm

Followed by a few documentation/comment fixups and a couple of places
where &lt;asm-powepc/...&gt; was being used explicitly.  Of the latter only
one was outside the arch code and it is a driver only built for powerpc.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc: BookE hardware watchpoint support</title>
<updated>2008-07-25T05:44:39+00:00</updated>
<author>
<name>Luis Machado</name>
<email>luisgpm@linux.vnet.ibm.com</email>
</author>
<published>2008-07-23T16:10:41+00:00</published>
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<id>urn:sha1:d6a61bfc06d6f2248f3e75f208d64e794082013c</id>
<content type='text'>
This patch implements support for HW based watchpoint via the
DBSR_DAC (Data Address Compare) facility of the BookE processors.

It does so by interfacing with the existing DABR breakpoint code
and adding the necessary bits and pieces for the new bits to
be properly set or cleared

Signed-off-by: Luis Machado &lt;luisgpm@br.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: fix giveup_vsx to save registers correctly</title>
<updated>2008-07-15T02:29:23+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2008-07-11T06:29:12+00:00</published>
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<id>urn:sha1:7c29217096d83f657e6ee70479af09b46f4275f6</id>
<content type='text'>
giveup_vsx didn't save the FPU and VMX regsiters.  Change it to be
like giveup_fpr/altivec which save these registers.

Also update call sites where FPU and VMX are already saved to use the
original giveup_vsx (renamed to __giveup_vsx).

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Add VSX context save/restore, ptrace and signal support</title>
<updated>2008-07-01T01:28:50+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2008-06-25T04:07:18+00:00</published>
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<id>urn:sha1:ce48b2100785e5ca629fb3aa8e3b50aca808f692</id>
<content type='text'>
This patch extends the floating point save and restore code to use the
VSX load/stores when VSX is available.  This will make FP context
save/restore marginally slower on FP only code, when VSX is available,
as it has to load/store 128bits rather than just 64bits.

Mixing FP, VMX and VSX code will get constant architected state.

The signals interface is extended to enable access to VSR 0-31
doubleword 1 after discussions with tool chain maintainers.  Backward
compatibility is maintained.

The ptrace interface is also extended to allow access to VSR 0-31 full
registers.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Move code patching code into arch/powerpc/lib/code-patching.c</title>
<updated>2008-07-01T01:28:18+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>michael@ellerman.id.au</email>
</author>
<published>2008-06-24T01:32:21+00:00</published>
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<id>urn:sha1:aaddd3eacaeaef3503035750b3f21ac2bfe97cbf</id>
<content type='text'>
We currently have a few routines for patching code in asm/system.h, because
they didn't fit anywhere else. I'd like to clean them up a little and add
some more, so first move them into a dedicated C file - they don't need to
be inlined.

While we're moving the code, drop create_function_call(), it's intended
caller never got merged and will be replaced in future with something
different.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Optimise smp_wmb on 64-bit processors</title>
<updated>2008-06-30T12:30:25+00:00</updated>
<author>
<name>Nick Piggin</name>
<email>npiggin@suse.de</email>
</author>
<published>2008-05-21T14:12:31+00:00</published>
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<id>urn:sha1:74f0609526afddd88bef40b651da24f3167b10b2</id>
<content type='text'>
For 64-bit processors, lwsync is the recommended method of store/store
ordering on caching enabled memory.  For those subarchs which have
lwsync, use it rather than eieio for smp_wmb.

Signed-off-by: Nick Piggin &lt;npiggin@suse.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'linux-2.6'</title>
<updated>2008-06-30T00:16:50+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2008-06-30T00:16:50+00:00</published>
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<id>urn:sha1:e9a4b6a3f6592862a67837e80aad3f50468857a6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[POWERPC] Fix rmb to order cacheable vs. noncacheable</title>
<updated>2008-06-16T05:00:20+00:00</updated>
<author>
<name>Nick Piggin</name>
<email>npiggin@suse.de</email>
</author>
<published>2008-05-21T14:10:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-op-linux/commit/?id=598056d5af8fef1dbe8f96f5c2b641a528184e5a'/>
<id>urn:sha1:598056d5af8fef1dbe8f96f5c2b641a528184e5a</id>
<content type='text'>
lwsync is explicitly defined not to have any effect on the ordering of
accesses to device memory, so it cannot be used for rmb(). sync appears
to be the only barrier which fits the bill.

Signed-off-by: Nick Piggin &lt;npiggin@suse.de&gt;
Acked-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Move declaration of init_bootmem_done into system.h</title>
<updated>2008-05-14T12:31:44+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>michael@ellerman.id.au</email>
</author>
<published>2008-05-08T04:27:07+00:00</published>
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<id>urn:sha1:5f25f06529ecb4b20efc7ba00de599f5b9f4b63c</id>
<content type='text'>
... instead of having an extern declaration in a .c file.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Use __always_inline for xchg* and cmpxchg*</title>
<updated>2008-04-29T05:57:34+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2008-04-28T04:44:08+00:00</published>
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<id>urn:sha1:dd18434ff0b7d9b9ad3d596985fc84b329d2f9a8</id>
<content type='text'>
This changes the definitions of the xchg and cmpxchg families of
functions in include/asm-powerpc/system.h to be marked __always_inline
rather than __inline__.  The reason for doing this is that we rely on
the compiler inlining them in order to eliminate the references to
__xchg_called_with_bad_pointer and __cmpxchg_called_with_bad_pointer,
which are deliberately left undefined.  Thus this change will enable
us to make the inline keyword be just a hint rather than a directive.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
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