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<title>talos-op-linux/drivers/reset/Kconfig, branch master</title>
<subtitle>Talos™ II Linux sources for OpenPOWER</subtitle>
<id>https://git.raptorcs.com/git/talos-op-linux/atom?h=master</id>
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<updated>2020-01-08T09:26:14+00:00</updated>
<entry>
<title>reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristate</title>
<updated>2020-01-08T09:26:14+00:00</updated>
<author>
<name>John Stultz</name>
<email>john.stultz@linaro.org</email>
</author>
<published>2020-01-08T00:19:13+00:00</published>
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<id>urn:sha1:e2d5e8332c9684ea254c84002bc1e13a42db9e54</id>
<content type='text'>
Allow CONFIG_RESET_QCOM_AOSS to be set as as =m to allow for the
driver to be loaded from a modules.

Also replaces the builtin_platform_driver() line with
module_platform_driver() and adds a MODULE_DEVICE_TABLE() entry.

Cc: Todd Kjos &lt;tkjos@google.com&gt;
Cc: Alistair Delva &lt;adelva@google.com&gt;
Cc: Amit Pundir &lt;amit.pundir@linaro.org&gt;
Signed-off-by: John Stultz &lt;john.stultz@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: Add Broadcom STB RESCAL reset controller</title>
<updated>2020-01-06T09:02:03+00:00</updated>
<author>
<name>Jim Quinlan</name>
<email>jim2101024@gmail.com</email>
</author>
<published>2020-01-03T19:04:29+00:00</published>
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<id>urn:sha1:4cf176e52397853e4a4dd37e917c5eafb47ba8d1</id>
<content type='text'>
On BCM7216 there is a special purpose reset controller named RESCAL
(reset calibration) which is necessary for SATA and PCIe0/1 to operate
correctly. This commit adds support for such a reset controller to be
available.

Signed-off-by: Jim Quinlan &lt;jim2101024@gmail.com&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: intel: Add system reset controller driver</title>
<updated>2020-01-03T10:01:27+00:00</updated>
<author>
<name>Dilip Kota</name>
<email>eswara.kota@linux.intel.com</email>
</author>
<published>2020-01-03T10:00:18+00:00</published>
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<id>urn:sha1:c9aef213e38cde27d4689a5cbe25a7c1b1db9fad</id>
<content type='text'>
Add driver for the reset controller present on Intel
Gateway SoCs for performing reset management of the
devices present on the SoC. Driver also registers a
reset handler to peform the entire device reset.

Signed-off-by: Dilip Kota &lt;eswara.kota@linux.intel.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: npcm: add NPCM reset controller driver</title>
<updated>2020-01-02T11:25:05+00:00</updated>
<author>
<name>Tomer Maimon</name>
<email>tmaimon77@gmail.com</email>
</author>
<published>2019-11-06T14:53:31+00:00</published>
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<id>urn:sha1:9c81b2ccf82da6e995b63e945afa882cfaa03ca9</id>
<content type='text'>
Add Nuvoton NPCM BMC reset controller driver.

Signed-off-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: simple: Add Realtek RTD1195/RTD1295</title>
<updated>2019-10-24T08:07:46+00:00</updated>
<author>
<name>Andreas Färber</name>
<email>afaerber@suse.de</email>
</author>
<published>2019-10-23T10:13:10+00:00</published>
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<id>urn:sha1:3ab831e50c1c6a56e0400e3bc65a82645b880300</id>
<content type='text'>
Enable RESET_SIMPLE for ARCH_REALTEK.
They can reuse the DesignWare bindings to avoid a new compatible.

Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: simple: Keep alphabetical order</title>
<updated>2019-10-24T08:07:32+00:00</updated>
<author>
<name>Andreas Färber</name>
<email>afaerber@suse.de</email>
</author>
<published>2019-10-23T10:13:09+00:00</published>
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<id>urn:sha1:5ac33eebf1ba77132b52b4c7750eee795f219245</id>
<content type='text'>
Restore alphabetical order for Kconfig dependencies and help text.
Compatibles got out of order too, but no functional change done here.

Goal is to make it obvious where to add new platforms.

Fixes: 64c47b624f64 ("reset: Add reset controller support for BM1880 SoC")
Fixes: 1d7592f84f92 ("reset: simple: Enable for ASPEED systems")
Fixes: 96a2f50305d1 ("reset: build simple reset controller driver for Agilex")
Cc: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: build simple reset controller driver for Agilex</title>
<updated>2019-10-22T09:09:19+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@kernel.org</email>
</author>
<published>2019-10-14T15:18:27+00:00</published>
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<id>urn:sha1:96a2f50305d11099d33d70014697da564e9ba6d0</id>
<content type='text'>
The Intel SoCFPGA Agilex platform shares the same reset controller that
is on the Stratix10.

Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'scmi-updates-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers</title>
<updated>2019-08-14T18:46:38+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-08-14T18:46:37+00:00</published>
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<id>urn:sha1:738590a3fe053929815fb71122c2519431807130</id>
<content type='text'>
ARM SCMI updates/fixes for v5.4

Handful of fixes/updates including:
1. SCMI v2.0(recently released) support for:
	- Performance protocol fast channels
	- Reset Management Protocol
2. SCMI infrastructure/core support for recieve(Rx) channels,
   asynchronous commands and delayed response
3. Usage of asynchronous commands for clock rate setting and sensor
   reading based on the attributes read from the firmware
4. Miscellaneous cleanups(typos, naming alignment with specification,
   and SPDX License identifier)
5. Couple of fixes: removal of extra check for invalid length and
   additional check to ensure platform/firmware has released shared
   memory before using it in OSPM

* tag 'scmi-updates-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: (22 commits)
  reset: Add support for resets provided by SCMI
  firmware: arm_scmi: Add RESET protocol in SCMI v2.0
  dt-bindings: arm: Extend SCMI to support new reset protocol
  firmware: arm_scmi: Make use SCMI v2.0 fastchannel for performance protocol
  firmware: arm_scmi: Add discovery of SCMI v2.0 performance fastchannels
  firmware: arm_scmi: Use {get,put}_unaligned_le{32,64} accessors
  firmware: arm_scmi: Use asynchronous CLOCK_RATE_SET when possible
  firmware: arm_scmi: Drop config flag in clk_ops-&gt;rate_set
  firmware: arm_scmi: Add asynchronous sensor read if it supports
  firmware: arm_scmi: Drop async flag in sensor_ops-&gt;reading_get
  firmware: arm_scmi: Add support for asynchronous commands and delayed response
  firmware: arm_scmi: Add mechanism to unpack message headers
  firmware: arm_scmi: Separate out tx buffer handling and prepare to add rx
  firmware: arm_scmi: Add receive channel support for notifications
  firmware: arm_scmi: Segregate tx channel handling and prepare to add rx
  firmware: arm_scmi: Reorder some functions to avoid forward declarations
  firmware: arm_scmi: Check if platform has released shmem before using
  firmware: arm_scmi: Use the term 'message' instead of 'command'
  firmware: arm_scmi: Fix few trivial typos in comments
  firmware: arm_scmi: Remove extra check for invalid length message responses
  ...

Link: https://lore.kernel.org/r/20190814172454.26191-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>reset: Add support for resets provided by SCMI</title>
<updated>2019-08-12T11:23:02+00:00</updated>
<author>
<name>Sudeep Holla</name>
<email>sudeep.holla@arm.com</email>
</author>
<published>2019-07-08T08:41:08+00:00</published>
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<id>urn:sha1:c8ae9c2da1cc5d18b6d51d10160508a3dc3436bf</id>
<content type='text'>
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control. System Control and Management Interface(SCMI) Message Protocol
is defined for the communication between the Application Cores(AP)
and the SCP.

Adds support for the resets provided using SCMI protocol for performing
reset management of various devices present on the SoC. Various reset
functionalities are achieved by the means of different ARM SCMI device
operations provided by the ARM SCMI framework.

Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
</content>
</entry>
<entry>
<title>reset: Add DesignWare IP support to simple reset</title>
<updated>2019-08-06T13:31:13+00:00</updated>
<author>
<name>Gustavo Pimentel</name>
<email>gustavo.pimentel@synopsys.com</email>
</author>
<published>2019-07-23T15:17:28+00:00</published>
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<id>urn:sha1:ea651ffd4f7febd4a0b3fdb98e39a6980e978a2c</id>
<content type='text'>
The reset-simple driver can be now used on DesignWare IPs by
default by selecting the following compatible strings:
 - snps,dw-high-reset for active high resets inputs
 - snps,dw-low-reset for active low resets inputs

Signed-off-by: Gustavo Pimentel &lt;gustavo.pimentel@synopsys.com&gt;
Signed-off-by: Luis Oliveira &lt;luis.oliveira@synopsys.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
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