talos-op-linux/drivers/pinctrl/mvebu/Kconfig, branch master

pinctrl: Fix Kconfig indentation

2019-11-21T14:06:07+00:00

Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1574306382-32516-1-git-send-email-krzk@kernel.org Signed-off-by: Linus Walleij

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46+00:00

Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

pinctrl: mvebu: add driver for Armada CP110 pinctrl

2017-06-16T09:23:36+00:00

This commit adds a pinctrl driver for the CP110 part of the Marvell Armada 7K and 8K SoCs. The Armada 7K has a single CP110, where almost all the MPP pins are available. On the other side, the Armada 8K has two CP110, and the available MPPs are split between the master CP110 (MPPs 32 to 62) and the slave CP110 (MPPs 0 to 31). The register interface to control the MPPs is however the same as all other mvebu SoCs, so we can reuse the common pinctrl-mvebu.c logic. Signed-off-by: Hanna Hawa Reviewed-by: Shadi Ammouri [updated for mvebu pinctrl and 4.9 changes: - converted to simple_mmio - converted to syscon/regmap - removed unimplemented .remove function - dropped DTS changes - defered gpio ranges to DT - fixed warning - properly set soc->nmodes -- rmk] Signed-off-by: Russell King [ add missing MPP[61:56] function 14 (SDIO) -- Konstantin Porotchkin] Signed-off-by: Konstantin Porotchkin [ allow to properly register more then one instance of this driver -- Grzegorz Jaszczyk] Signed-off-by: Grzegorz Jaszczyk [ - rebased on 4.12-rc1 - fixed the 80 character limit for mvebu_mpp_mode array - aligned the compatible name on the ones already used - fixed the MPP table for CP110: some MPP are not available on Armada 7K -- Gregory CLEMENT] Signed-off-by: Gregory CLEMENT Tested-by: Thomas Petazzoni Signed-off-by: Linus Walleij

pinctrl: mvebu: add driver for Armada AP806 pinctrl

2017-06-16T09:22:33+00:00

This commit adds a pinctrl driver for the pin-muxing controller found in the AP806 part of the Marvell Armada 7K and 8K SoCs. Its register interface is compatible with the one used by previous mvebu pin controllers, so the common logic in drivers/pinctrl/mvebu/pinctrl-mvebu.c is used. Signed-off-by: Hanna Hawa Reviewed-by: Shadi Ammouri [updated for mvebu pinctrl changes - converted to simple_mmio - removed unimplemented .remove function - removed DTS description - converted to use syscon/regmap --rmk] Signed-off-by: Russell King Reviewed-by: Thomas Petazzoni Signed-off-by: Gregory CLEMENT Signed-off-by: Linus Walleij

pinctrl: avoid PLAT_ORION dependency

2017-06-16T09:20:51+00:00

Armada 8040 also needs orion pinctrl, and as these symbols are only selected, there's no need to make them depend on PLAT_ORION. Reviewed-by: Thomas Petazzoni Signed-off-by: Russell King Signed-off-by: Gregory CLEMENT Signed-off-by: Linus Walleij

pinctrl: armada-37xx: Add pin controller support for Armada 37xx

2017-04-24T09:31:36+00:00

The Armada 37xx SoC come with 2 pin controllers: one on the south bridge (managing 28 pins) and one on the north bridge (managing 36 pins). At the hardware level the controller configure the pins by group and not pin by pin. This constraint is reflected in the design of the driver: only the group related functions are implemented. Signed-off-by: Gregory CLEMENT Signed-off-by: Linus Walleij

pinctrl: mvebu: add pinctrl driver for Marvell Armada 39x

2015-03-04T12:53:55+00:00

This commit adds a new pinctrl driver for the Marvell Armada 39x family of processors, which hooks into the existing infrastructure to support pin-muxing on Marvell EBU processors. Two variants of the Armada 39x are supported: 88F6920 (Armada 390) and 88F6928 (Armada 398), which have a few differences in the available functions for certain pins. Signed-off-by: Thomas Petazzoni Signed-off-by: Linus Walleij

pinctrl: mvebu: new driver for Orion platforms

2014-04-24T13:09:35+00:00

This commit extends the pinctrl mvebu logic with a new driver to cover Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281 variants of Orion5x, which are the three ones supported by the old style MPP code in arch/arm/mach-orion5x/. Signed-off-by: Thomas Petazzoni Acked-by: Sebastian Hesselbarth Signed-off-by: Linus Walleij

Merge tag 'tags/for-mvebu-pinctrl-3xx' into mvebu/pinctrl

2014-03-01T07:03:52+00:00

Sign for-mvebu/pinctrl-3xx

pinctrl: mvebu: dove: request syscon regmap for global registers

2014-02-25T20:16:09+00:00

Dove pinctrl uses some global config registers to control pins. This patch requests a syscon regmap for those registers. As this changes DT to driver requirements, fallback to a self-registered regmap with hardcoded resources, if the corresponding syscon DT node is missing. Also, WARN about old DT binding usage to encourage users to update their DTBs. Signed-off-by: Sebastian Hesselbarth Acked-by: Linus Walleij