talos-op-linux/drivers/pinctrl/bcm/Kconfig, branch master

Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2019-07-13T22:02:27+00:00

Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.3 kernel cycle: Core changes: - Device links can optionally be added between a pin control producer and its consumers. This will affect how the system power management is handled: a pin controller will not suspend before all of its consumers have been suspended. This was necessary for the ST Microelectronics STMFX expander and need to be tested on other systems as well: it makes sense to make this default in the long run. Right now it is opt-in per driver. - Drive strength can be specified in microamps. With decreases in silicon technology, milliamps isn't granular enough, let's make it possible to select drive strengths in microamps. Right now the Meson (AMlogic) driver needs this. New drivers: - New subdriver for the Tegra 194 SoC. - New subdriver for the Qualcomm SDM845. - New subdriver for the Qualcomm SM8150. - New subdriver for the Freescale i.MX8MN (Freescale is now a product line of NXP). - New subdriver for Marvell MV98DX1135. Driver improvements: - The Bitmain BM1880 driver now supports pin config in addition to muxing. - The Qualcomm drivers can now reserve some GPIOs as taken aside and not usable for users. This is used in ACPI systems to take out some GPIO lines used by the BIOS so that noone else (neither kernel nor userspace) will play with them by mistake and crash the machine. - A slew of refurbishing around the Aspeed drivers (board management controllers for servers) in preparation for the new Aspeed AST2600 SoC. - A slew of improvements over the SH PFC drivers as usual. - Misc cleanups and fixes" * tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits) pinctrl: aspeed: Strip moved macros and structs from private header pinctrl: aspeed: Fix missed include pinctrl: baytrail: Use GENMASK() consistently pinctrl: baytrail: Re-use data structures from pinctrl-intel.h pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux() pinctrl: qcom: Add SM8150 pinctrl driver dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding dt-bindings: pinctrl: qcom: Document missing gpio nodes pinctrl: aspeed: Add implementation-related documentation pinctrl: aspeed: Split out pinmux from general pinctrl pinctrl: aspeed: Clarify comment about strapping W1C pinctrl: aspeed: Correct comment that is no longer true MAINTAINERS: Add entry for ASPEED pinctrl drivers dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema dt-bindings: pinctrl: aspeed: Split bindings document in two pinctrl: qcom: Add irq_enable callback for msm gpio pinctrl: madera: Fixup SPDX headers pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard pinctrl: tegra: Add bitmask support for parked bits ...

pinctrl: bcm2835: Fix build error without CONFIG_OF

2019-06-01T22:02:42+00:00

drivers/pinctrl/bcm/pinctrl-bcm2835.c: In function bcm2835_pctl_dt_node_to_map: drivers/pinctrl/bcm/pinctrl-bcm2835.c:720:8: error: implicit declaration of function pinconf_generic_dt_node_to_map_all; drivers/pinctrl/bcm/pinctrl-bcm2835.c: In function bcm2835_pinctrl_probe: drivers/pinctrl/bcm/pinctrl-bcm2835.c:1022:15: error: struct gpio_chip has no member named of_node pc->gpio_chip.of_node = np; Reported-by: Hulk Robot Fixes: 0de704955ee4 ("pinctrl: bcm2835: Add support for generic pinctrl binding") Signed-off-by: YueHaibing Signed-off-by: Linus Walleij

pinctrl: bcm: Allow PINCTRL_BCM2835 for ARCH_BRCMSTB

2019-05-23T07:24:46+00:00

ARCH_BRCMSTB needs to use the BCM2835 pin controller for chips like BCM7211 which adopted that pin controller for GPIO. This commit makes the option menu configurable with default enabled for ARCH_BRCMSTB and ARCH_BCM2835. Signed-off-by: Doug Berger Signed-off-by: Florian Fainelli Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46+00:00

Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

pinctrl: bcm: add Northstar driver

2018-10-10T07:16:54+00:00

This driver provides support for Northstar mux controller. It differs from Northstar Plus one so a new binding and driver were needed. Signed-off-by: Rafał Miłecki Signed-off-by: Linus Walleij

pinctrl: bcm2835: Add support for generic pinctrl binding

2018-05-16T12:00:00+00:00

To keep driver up to date we add generic pinctrl binding support, which covers the features used in this driver and has additional node properties that this SoC has compatibility, so enabling future implementations of these properties without the need to create new node properties in the device trees. The logic of this change maintain the old brcm legacy binding support in order to keep the ABI stable. Signed-off-by: Matheus Castello Reviewed-by: Eric Anholt Acked-by: Stefan Wahren Signed-off-by: Linus Walleij

scripts/spelling.txt: add "overrided" pattern and fix typo instances

2017-02-28T02:43:47+00:00

Fix typos and add the following to the scripts/spelling.txt: overrided||overridden Link: http://lkml.kernel.org/r/1481573103-11329-22-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP

2016-12-07T14:27:01+00:00

It should be possible to use the GPIOLIB_IRQCHIP helper library with the BCM2835 driver since it is a pretty straight forward cascaded irqchip. The only difference from other drivers is that the BCM2835 has several banks for a single gpiochip, and each bank has a separate IRQ line. Instead of creating one gpiochip per bank, a single gpiochip covers all banks GPIO lines. This makes it necessary to resolve the bank ID in the IRQ handler. The GPIOLIB_IRQCHIP allows several IRQs to be cascaded off the same gpiochip by calling gpiochip_set_chained_irqchip() repeatedly, but we have been a bit short on examples for how this should be handled in practice, so this is intended as an example of how this can be achieved. The old code did not model the chip as a chained interrupt handler, but this patch also rectifies that situation. Cc: Stephen Warren Tested-by: Stefan Wahren Tested-by: Eric Anholt Acked-by: Eric Anholt Signed-off-by: Linus Walleij

pinctrl: bcm: add OF dependencies

2016-07-22T14:43:32+00:00

Building without CONFIG_OF gives us these warnings for the broadcom pinctrl drivers: drivers/pinctrl/bcm/pinctrl-nsp-mux.c:356:20: error: 'pinconf_generic_dt_node_to_map_group' undeclared here (not in a function) drivers/pinctrl/bcm/pinctrl-cygnus-mux.c:739:20: error: 'pinconf_generic_dt_node_to_map_group' undeclared here (not in a function) The function is only available when CONFIG_OF is set, so we should add a Kconfig dependency for both drivers. Signed-off-by: Arnd Bergmann Fixes: cc4fa83f66e9 ("pinctrl: nsp: add pinmux driver support for Broadcom NSP SoC") Signed-off-by: Linus Walleij

pinctrl: nsp: add pinmux driver support for Broadcom NSP SoC

2016-06-29T08:06:00+00:00

This adds the initial support of the Broadcom NSP pinmux driver. Signed-off-by: Yendapally Reddy Dhananjaya Reddy Reviewed-by: Ray Jui Signed-off-by: Linus Walleij