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<title>talos-op-linux/drivers/pci/pcie, branch master</title>
<subtitle>Talos™ II Linux sources for OpenPOWER</subtitle>
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<updated>2020-01-23T22:40:03+00:00</updated>
<entry>
<title>PCI/AER: Initialize aer_fifo</title>
<updated>2020-01-23T22:40:03+00:00</updated>
<author>
<name>Dongdong Liu</name>
<email>liudongdong3@huawei.com</email>
</author>
<published>2020-01-23T08:26:31+00:00</published>
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<id>urn:sha1:d95f20c4f07020ebc605f3b46af4b6db9eb5fc99</id>
<content type='text'>
Previously we did not call INIT_KFIFO() for aer_fifo.  This leads to
kfifo_put() sometimes returning 0 (queue full) when in fact it is not.

It is easy to reproduce the problem by using aer-inject:

  $ aer-inject -s :82:00.0 multiple-corr-nonfatal

The content of the multiple-corr-nonfatal file is as below:

  AER
  COR RCVR
  HL 0 1 2 3
  AER
  UNCOR POISON_TLP
  HL 4 5 6 7

Fixes: 27c1ce8bbed7 ("PCI/AER: Use kfifo for tracking events instead of reimplementing it")
Link: https://lore.kernel.org/r/1579767991-103898-1-git-send-email-liudongdong3@huawei.com
Signed-off-by: Dongdong Liu &lt;liudongdong3@huawei.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/AER: Factor message prefixes with dev_fmt()</title>
<updated>2020-01-23T22:39:53+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-12-13T22:46:05+00:00</published>
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<id>urn:sha1:8d077c3ce0109c406c265cafc334258caee47e6d</id>
<content type='text'>
Define dev_fmt() with the common prefix of log messages so we don't have to
repeat it in every printk.  No functional change intended.

Link: https://lore.kernel.org/r/20191213225709.GA213811@google.com
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/AER: Log which device prevents error recovery</title>
<updated>2020-01-23T22:39:02+00:00</updated>
<author>
<name>Yicong Yang</name>
<email>yangyicong@hisilicon.com</email>
</author>
<published>2019-12-13T11:44:34+00:00</published>
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<id>urn:sha1:01daacfb9035e5b86d43a01f11a0614648f306c1</id>
<content type='text'>
PCI error recovery will fail if any device under the Root Port doesn't have
an error_detected callback.  Currently only the failure result is printed,
which is not enough to identify the driver that lacks the callback.

Log a message to identify the device with no error_detected callback.

[bhelgaas: tweak log message]
Link: https://lore.kernel.org/r/1576237474-32021-1-git-send-email-yangyicong@hisilicon.com
Signed-off-by: Yicong Yang &lt;yangyicong@hisilicon.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'pci/misc'</title>
<updated>2019-11-28T14:54:32+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-28T14:54:32+00:00</published>
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<id>urn:sha1:e87eb585d31fadb5e9e549a1de4b2da60a79bfc9</id>
<content type='text'>
  - Add NumaChip SPDX header (Krzysztof Wilczynski)

  - Replace EXTRA_CFLAGS with ccflags-y (Krzysztof Wilczynski)

  - Remove unused includes (Krzysztof Wilczynski)

  - Avoid AMD FCH XHCI USB PME# from D0 defect that prevents wakeup on USB
    2.0 or 1.1 connect events (Kai-Heng Feng)

  - Removed unused sysfs attribute groups (Ben Dooks)

  - Remove PTM and ASPM dependencies on PCIEPORTBUS (Bjorn Helgaas)

  - Add PCIe Link Control 2 register field definitions to replace magic
    numbers in AMDGPU and Radeon CIK/SI (Bjorn Helgaas)

  - Fix incorrect Link Control 2 Transmit Margin usage in AMDGPU and Radeon
    CIK/SI PCIe Gen3 link training (Bjorn Helgaas)

  - Use pcie_capability_read_word() instead of pci_read_config_word() in
    AMDGPU and Radeon CIK/SI (Frederick Lawler)

* pci/misc:
  drm/radeon: Prefer pcie_capability_read_word()
  drm/radeon: Replace numbers with PCI_EXP_LNKCTL2 definitions
  drm/radeon: Correct Transmit Margin masks
  drm/amdgpu: Prefer pcie_capability_read_word()
  drm/amdgpu: Replace numbers with PCI_EXP_LNKCTL2 definitions
  drm/amdgpu: Correct Transmit Margin masks
  PCI: Add #defines for Enter Compliance, Transmit Margin
  PCI: Allow building PCIe things without PCIEPORTBUS
  PCI: Remove PCIe Kconfig dependencies on PCI
  PCI/ASPM: Remove dependency on PCIEPORTBUS
  PCI/PTM: Remove dependency on PCIEPORTBUS
  PCI/PTM: Remove spurious "d" from granularity message
  PCI: sysfs: Remove unused attribute groups
  x86/PCI: Avoid AMD FCH XHCI USB PME# from D0 defect
  PCI: Remove unused includes and superfluous struct declaration
  x86/PCI: Replace deprecated EXTRA_CFLAGS with ccflags-y
  x86/PCI: Correct SPDX comment style
  x86/PCI: Add NumaChip SPDX GPL-2.0 to replace COPYING boilerplate
</content>
</entry>
<entry>
<title>Merge branch 'pci/aspm'</title>
<updated>2019-11-28T14:54:29+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-28T14:54:29+00:00</published>
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<id>urn:sha1:abd05c97f9711a4baa8cd43832893b8df45d459e</id>
<content type='text'>
  - Remove unnecessary ASPM locking (Bjorn Helgaas)

  - Add support for disabling L1 PM Substates (Heiner Kallweit)

  - Allow re-enabling Clock PM after it has been disabled (Heiner Kallweit)

  - Add sysfs attributes for controlling ASPM link states (Heiner Kallweit)

  - Remove CONFIG_PCIEASPM_DEBUG, including "link_state" and "clk_ctl"
    sysfs files (Heiner Kallweit)

* pci/aspm:
  PCI/ASPM: Remove PCIEASPM_DEBUG Kconfig option and related code
  PCI/ASPM: Add sysfs attributes for controlling ASPM link states
  PCI/ASPM: Add pcie_aspm_get_link()
  PCI/ASPM: Allow re-enabling Clock PM
  PCI/ASPM: Add L1 PM substate support to pci_disable_link_state()
  PCI/ASPM: Remove pcie_aspm_enabled() unnecessary locking
</content>
</entry>
<entry>
<title>PCI/ASPM: Remove PCIEASPM_DEBUG Kconfig option and related code</title>
<updated>2019-11-21T23:31:46+00:00</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-10-05T12:08:52+00:00</published>
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<id>urn:sha1:87e90283c94c76ee11d379ab5a0973382bbd0baf</id>
<content type='text'>
Previously, CONFIG_PCIEASPM_DEBUG enabled "link_state" and "clk_ctl" sysfs
files that controlled ASPM.  We believe these files were rarely if ever
used.

We recently added sysfs ASPM controls that are always present, so the debug
code is no longer needed.  Removing this debug code has been discussed for
quite some time, see e.g. [0].

Remove PCIEASPM_DEBUG and the related code.

[0] https://lore.kernel.org/lkml/20180727202619.GD173328@bhelgaas-glaptop.roam.corp.google.com/
Link: https://lore.kernel.org/r/ec935d8e-c084-3938-f1d1-748617596b25@gmail.com
Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/ASPM: Add sysfs attributes for controlling ASPM link states</title>
<updated>2019-11-21T23:30:24+00:00</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-10-05T12:07:56+00:00</published>
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<id>urn:sha1:72ea91afbfb08619696ccde610ee4d0d29cf4a1d</id>
<content type='text'>
Add sysfs attributes to Endpoints and other Upstream Ports to control ASPM,
Clock PM, and L1 PM Substates.  The new attributes are:

  /sys/devices/pci*/.../link/clkpm
  /sys/devices/pci*/.../link/l0s_aspm
  /sys/devices/pci*/.../link/l1_aspm
  /sys/devices/pci*/.../link/l1_1_aspm
  /sys/devices/pci*/.../link/l1_2_aspm
  /sys/devices/pci*/.../link/l1_1_pcipm
  /sys/devices/pci*/.../link/l1_2_pcipm

An attribute is only visible if both ends of the Link leading to the device
support the state.  Writing y/1/on to the file enables the state; n/0/off
disables it.

These attributes can be used to tune the power/performance tradeoff for
individual devices.

[bhelgaas: commit log, rename directory to "link"]
Link: https://lore.kernel.org/r/b1c83f8a-9bf6-eac5-82d0-cf5b90128fbf@gmail.com
Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: Remove PCIe Kconfig dependencies on PCI</title>
<updated>2019-11-21T13:52:33+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-06T22:09:40+00:00</published>
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<id>urn:sha1:b6479581e6823239c3e03b1d006f160c6c491ba0</id>
<content type='text'>
drivers/pci/pcie/Kconfig is only sourced by drivers/pci/Kconfig, and only
when PCI is defined, so there's no need to depend on PCI again.  Remove the
unnecessary dependencies.

Link: https://lore.kernel.org/r/20191106222420.10216-5-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI/ASPM: Remove dependency on PCIEPORTBUS</title>
<updated>2019-11-21T13:52:32+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-06T22:07:36+00:00</published>
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<id>urn:sha1:33ce09ef17329be407fc238a214d6f49fdc8a007</id>
<content type='text'>
The ASPM support does not depend on the portdrv, so remove the Kconfig
dependency.

Link: https://lore.kernel.org/r/20191106222420.10216-4-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI/PTM: Remove dependency on PCIEPORTBUS</title>
<updated>2019-11-21T13:52:32+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-06T22:01:15+00:00</published>
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<id>urn:sha1:97a0ac8a4678fb6340f6b2646e7c46e9c2872e02</id>
<content type='text'>
The PTM support does not depend on the portdrv, so remove the Kconfig
dependency.

Link: https://lore.kernel.org/r/20191106222420.10216-3-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
Cc: Jonathan Yong &lt;jonathan.yong@intel.com&gt;
</content>
</entry>
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