Talos™ II Linux sources for OpenPOWER https://git.raptorcs.com/git/talos-op-linux/atom?h=v4.4.4 2011-08-12T10:41:30+00:00 2011-08-12T10:41:30+00:00 Jeff Kirsher jeffrey.t.kirsher@intel.com 2011-06-15T18:23:00+00:00 urn:sha1:b13ad8f498793dc582b7f42f27b8f44490bd608d Move the Xilinx drivers into drivers/net/ethernet/xilinx/ and make the necessary Kconfig and Makefile changes. CC: John Williams <john.williams@petalogix.com> CC: "David H. Lynch Jr." <dhlii@dlasys.net> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> 2010-05-27T03:44:30+00:00 Brian Hill brian.hill@xilinx.com 2010-05-27T03:44:30+00:00 urn:sha1:23ecc4bde21f0ccb38f4b53cadde7fc5d67d68e3 The current checksum offload code does not work and this corrects that functionality. It also updates the interrupt coallescing initialization so than there are fewer interrupts and performance is increased. Signed-off-by: Brian Hill <brian.hill@xilinx.com> Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net> 2010-04-13T08:33:44+00:00 John Linn john.linn@xilinx.com 2010-04-08T07:08:02+00:00 urn:sha1:e44171f115de3dedf34064646206deb91549865f This patch adds support for using the LL TEMAC Ethernet driver on non-Virtex 5 platforms by adding support for accessing the Soft DMA registers as if they were memory mapped instead of solely through the DCR's (available on the Virtex 5). The patch also updates the driver so that it runs on the MicroBlaze. The changes were tested on the PowerPC 440, PowerPC 405, and the MicroBlaze platforms. Signed-off-by: John Tyner <jtyner@cs.ucr.edu> Signed-off-by: John Linn <john.linn@xilinx.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: David S. Miller <davem@davemloft.net> 2010-04-08T06:28:28+00:00 David S. Miller davem@davemloft.net 2010-04-08T06:28:28+00:00 urn:sha1:4d8dc679084d8dd7b81b2ae245844246deb0759c This reverts commit 459569145516f7967b916c57445feb02c600668c. Uses virt_to_bus() and breaks the build. Signed-off-by: David S. Miller <davem@davemloft.net> 2010-04-07T02:50:19+00:00 John Linn john.linn@xilinx.com 2010-04-06T11:43:28+00:00 urn:sha1:459569145516f7967b916c57445feb02c600668c This patch adds support for using the LL TEMAC Ethernet driver on non-Virtex 5 platforms by adding support for accessing the Soft DMA registers as if they were memory mapped instead of solely through the DCR's (available on the Virtex 5). The patch also updates the driver so that it runs on the MicroBlaze. The changes were tested on the PowerPC 440, PowerPC 405, and the MicroBlaze platforms. Signed-off-by: John Tyner <jtyner@cs.ucr.edu> Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net> 2009-04-27T09:53:52+00:00 Grant Likely grant.likely@secretlab.ca 2009-04-25T12:53:39+00:00 urn:sha1:92744989533cbe85e8057935d230e128810168ce This patch adds support for the Xilinx ll_temac 10/100/1000 Ethernet device. The ll_temac ipcore is typically used on Xilinx Virtex and Spartan designs attached to either a PowerPC 4xx or Microblaze processor. At the present moment, this driver only works with Virtex5 PowerPC designs because it assumes DCR is used to access the DMA registers. However, the low level access to DMA registers is abstracted and it should be easy to adapt for the other implementations. I'm posting this driver now as an RFC. There are still some things that need to be tightened up, but it does appear to be stable. Derived from driver code written by Yoshio Kashiwagi and David H. Lynch Jr. Tested on Xilinx ML507 eval board with Base System Builder generated FPGA design. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>