talos-op-linux/drivers/irqchip/Kconfig, branch master

irqchip: Some Kconfig cleanup for C-SKY

2020-01-29T12:19:58+00:00

Fixes to Kconfig help text: - spell out "hardware" - fix verb usage Signed-off-by: Randy Dunlap Signed-off-by: Marc Zyngier Acked-by: Guo Ren Link: https://lore.kernel.org/r/d44baeee-cceb-7c02-7249-e6b4817f0847@infradead.org

irqchip: Add NXP INTMUX interrupt multiplexer support

2020-01-20T19:10:05+00:00

The Interrupt Multiplexer (INTMUX) expands the number of peripherals that can interrupt the core: * The INTMUX has 8 channels that are assigned to 8 NVIC interrupt slots. * Each INTMUX channel can receive up to 32 interrupt sources and has 1 interrupt output. * The INTMUX routes the interrupt sources to the interrupt outputs. Signed-off-by: Shengjiu Wang Signed-off-by: Joakim Zhang Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20200117060653.27485-3-qiangqing.zhang@nxp.com

irqchip: Define EXYNOS_IRQ_COMBINER

2020-01-20T19:10:05+00:00

This patch is written to clean up dependency of ARCH_EXYNOS Not all exynos device have IRQ_COMBINER, especially aarch64 EXYNOS but it is built for all exynos devices. Thus add the config for EXYNOS_IRQ_COMBINER remove direct dependency between ARCH_EXYNOS and exynos-combiner.c and only selected on the aarch32 devices Signed-off-by: Hyunki Koo Signed-off-by: Marc Zyngier Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20191224211108.7128-1-hyunki00.koo@gmail.com

irqchip/sifive-plic: Support irq domain hierarchy

2020-01-20T09:24:56+00:00

Add support for hierarchical irq domains. This is needed as pre-requisite for gpio-sifive driver. Signed-off-by: Yash Shah Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/1575976274-13487-4-git-send-email-yash.shah@sifive.com

irqchip: Place CONFIG_SIFIVE_PLIC into the menu

2019-11-10T18:48:35+00:00

Somehow CONFIG_SIFIVE_PLIC ended up outside of the "IRQ chip support" menu. Fixes: 8237f8bc4f6e ("irqchip: add a SiFive PLIC driver") Signed-off-by: Jonathan Neuschäfer Signed-off-by: Marc Zyngier Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Link: https://lore.kernel.org/r/20191002144452.10178-1-j.neuschaefer@gmx.net

irqchip: Add support for Layerscape external interrupt lines

2019-11-10T18:47:49+00:00

The LS1021A allows inverting the polarity of six interrupt lines IRQ[0:5] via the scfg_intpcr register, effectively allowing IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_EDGE_FALLING for those. We just need to check the type, set the relevant bit in INTPCR accordingly, and fixup the type argument before calling the GIC's irq_set_type. In fact, the power-on-reset value of the INTPCR register on the LS1021A is so that all six lines have their polarity inverted. Hence any hardware connected to those lines is unusable without this: If the line is indeed active low, the generic GIC code will reject an irq spec with IRQ_TYPE_LEVEL_LOW, while if the line is active high, we must obviously disable the polarity inversion (writing 0 to the relevant bit) before unmasking the interrupt. Some other Layerscape SOCs (LS1043A, LS1046A) have a similar feature, just with a different number of external interrupt lines (and a different POR value for the INTPCR register). This driver should be prepared for supporting those by properly filling out the device tree node. I have the reference manuals for all three boards, but I've only tested the driver on an LS1021A. Unfortunately, the Kconfig symbol ARCH_LAYERSCAPE only exists on arm64, so do as is done for irq-ls-scfg-msi.c: introduce a new symbol which is set when either ARCH_LAYERSCAPE or SOC_LS1021A is set. Signed-off-by: Rasmus Villemoes Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20191107122115.6244-3-linux@rasmusvillemoes.dk

irqchip/irq-ingenic-tcu: Fix COMPILE_TEST building

2019-08-19T21:15:37+00:00

While do COMPILE_TEST building, if GENERIC_IRQ_CHIP is not selected, it fails: drivers/irqchip/irq-ingenic-tcu.o: In function `ingenic_tcu_intc_cascade': irq-ingenic-tcu.c:(.text+0x13f): undefined reference to `irq_get_domain_generic_chip' drivers/irqchip/irq-ingenic-tcu.o: In function `ingenic_tcu_irq_init': irq-ingenic-tcu.c:(.init.text+0x97): undefined reference to `irq_generic_chip_ops' irq-ingenic-tcu.c:(.init.text+0xdd): undefined reference to `__irq_alloc_domain_generic_chips' irq-ingenic-tcu.c:(.init.text+0x10b): undefined reference to `irq_get_domain_generic_chip' select GENERIC_IRQ_CHIP to fix this. Reported-by: Hulk Robot Fixes: 9536eba03ec7 ("irqchip: Add irq-ingenic-tcu driver") Signed-off-by: YueHaibing Acked-by: Thomas Gleixner Signed-off-by: Paul Burton Cc: Cc: Cc: Cc: Cc: Cc: Cc:

irqchip: Add irq-ingenic-tcu driver

2019-08-08T22:30:07+00:00

This driver handles the interrupt controller built in the Timer/Counter Unit (TCU) of the JZ47xx SoCs from Ingenic. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Reviewed-by: Thomas Gleixner Acked-by: Marc Zyngier Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Jonathan Corbet Cc: Lee Jones Cc: Arnd Bergmann Cc: Daniel Lezcano Cc: Michael Turquette Cc: Stephen Boyd Cc: Jason Cooper Cc: Marc Zyngier Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me

irqchip/gic-pm: Remove PM_CLK dependency

2019-07-03T08:33:01+00:00

gic-pm driver does not use pm-clk interface now and hence the dependency is removed from Kconfig. Signed-off-by: Sameer Pujar Acked-by: Jon Hunter Signed-off-by: Marc Zyngier

irqchip/al-fic: Introduce Amazon's Annapurna Labs Fabric Interrupt Controller Driver

2019-07-03T08:19:11+00:00

The Amazon's Annapurna Labs Fabric Interrupt Controller has 32 inputs. A FIC (Fabric Interrupt Controller) may be cascaded into another FIC or directly to the main CPU Interrupt Controller (e.g. GIC). Signed-off-by: Talel Shenhar Signed-off-by: Marc Zyngier