talos-op-linux/drivers/gpu/drm/meson, branch master

drm: meson: fix address type confusion

2020-01-08T12:51:56+00:00

Casting a pointer to dma_addr_t produces a warning: drivers/gpu/drm/meson/meson_rdma.c: In function 'meson_rdma_free': drivers/gpu/drm/meson/meson_rdma.c:59:25: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] priv->rdma.addr_phys = (dma_addr_t)NULL; In this case, it's worse because the variable name has the suffix '_phys', which often indicates a phys_addr_t rather than dma_addr_t, i.e. yet another incompatible type. Change it to use consistent naming and avoid NULL. Fixes: 63fba242c464 ("drm/meson: add RDMA module driver") Signed-off-by: Arnd Bergmann Acked-by: Neil Armstrong Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20200107214653.1173199-1-arnd@arndb.de

drm: meson: Remove unneeded semicolon

2020-01-06T14:56:23+00:00

Fixes coccicheck warning: drivers/gpu/drm/meson/meson_crtc.c:360:3-4: Unneeded semicolon drivers/gpu/drm/meson/meson_plane.c:181:2-3: Unneeded semicolon Reported-by: Hulk Robot Signed-off-by: zhengbin Reviewed-by: Neil Armstrong Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/1576468701-69717-1-git-send-email-zhengbin13@huawei.com

Merge tag 'drm-misc-next-2019-12-16' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

2019-12-17T12:57:54+00:00

drm-misc-next for v5.6: UAPI Changes: - Add support for DMA-BUF HEAPS. Cross-subsystem Changes: - mipi dsi definition updates, pulled into drm-intel as well. - Add lockdep annotations for dma_resv vs mmap_sem and fs_reclaim. - Remove support for dma-buf kmap/kunmap. - Constify fb_ops in all fbdev drivers, including drm drivers and drm-core, and media as well. Core Changes: - Small cleanups to ttm. - Fix SCDC definition. - Assorted cleanups to core. - Add todo to remove load/unload hooks, and use generic fbdev emulation. - Assorted documentation updates. - Use blocking ww lock in ttm fault handler. - Remove drm_fb_helper_fbdev_setup/teardown. - Warning fixes with W=1 for atomic. - Use drm_debug_enabled() instead of drm_debug flag testing in various drivers. - Fallback to nontiled mode in fbdev emulation when not all tiles are present. (Later on reverted) - Various kconfig indentation fixes in core and drivers. - Fix freeing transactions in dp-mst correctly. - Sean Paul is steping down as core maintainer. :-( - Add lockdep annotations for atomic locks vs dma-resv. - Prevent use-after-free for a bad job in drm_scheduler. - Fill out all block sizes in the P01x and P210 definitions. - Avoid division by zero in drm/rect, and fix bounds. - Add drm/rect selftests. - Add aspect ratio and alternate clocks for HDMI 4k modes. - Add todo for drm_framebuffer_funcs and fb_create cleanup. - Drop DRM_AUTH for prime import/export ioctls. - Clear DP-MST payload id tables downstream when initializating. - Fix for DSC throughput definition. - Add extra FEC definitions. - Fix fake offset in drm_gem_object_funs.mmap. - Stop using encoder->bridge in core directly - Handle bridge chaining slightly better. - Add backlight support to drm/panel, and use it in many panel drivers. - Increase max number of y420 modes from 128 to 256, as preparation to add the new modes. Driver Changes: - Small fixes all over. - Fix documentation in vkms. - Fix mmap_sem vs dma_resv in nouveau. - Small cleanup in komeda. - Add page flip support in gma500 for psb/cdv. - Add ddc symlink in the connector sysfs directory for many drivers. - Add support for analogic an6345, and fix small bugs in it. - Add atomic modesetting support to ast. - Fix radeon fault handler VMA race. - Switch udl to use generic shmem helpers. - Unconditional vblank handling for mcde. - Miscellaneous fixes to mcde. - Tweak debug output from komeda using debugfs. - Add gamma and color transform support to komeda for DOU-IPS. - Add support for sony acx424AKP panel. - Various small cleanups to gma500. - Use generic fbdev emulation in udl, and replace udl_framebuffer with generic implementation. - Add support for Logic PD Type 28 panel. - Use drm_panel_* wrapper functions in exynos/tegra/msm. - Add devicetree bindings for generic DSI panels. - Don't include drm_pci.h directly in many drivers. - Add support for begin/end_cpu_access in udmabuf. - Stop using drm_get_pci_dev in gma500 and mga200. - Fixes to UDL damage handling, and use dma_buf_begin/end_cpu_access. - Add devfreq thermal support to panfrost. - Fix hotplug with daisy chained monitors by removing VCPI when disabling topology manager. - meson: Add support for OSD1 plane AFBC commit. - Stop displaying garbage when toggling ast primary plane on/off. - More cleanups and fixes to UDL. - Add D32 suport to komeda. - Remove globle copy of drm_dev in gma500. - Add support for Boe Himax8279d MIPI-DSI LCD panel. - Add support for ingenic JZ4770 panel. - Small null pointer deference fix in ingenic. - Remove support for the special tfp420 driver, as there is a generic way to do it. Signed-off-by: Daniel Vetter From: Maarten Lankhorst Link: https://patchwork.freedesktop.org/patch/msgid/ba73535a-9334-5302-2e1f-5208bd7390bd@linux.intel.com

Merge tag 'drm-misc-fixes-2019-12-11' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes

2019-12-12T03:12:17+00:00

- Expand dma-buf MAINTAINER scope - Fix mode matching for drivers not using picture_aspect_ratio Signed-off-by: Dave Airlie From: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20191211212107.GA257983@art_vandelay

drm/meson: crtc: add OSD1 plane AFBC commit

2019-12-10T09:10:29+00:00

Finally, setup the VIU registers and start the AFBC decoder to support displaying AFBC encoded buffers on Amlogic GXM and G12A SoCs. The RDMA is used here to reset and program the AFBC decoder unit on each vsync without involving the interrupt handler that can be masked for a long period of time, producing display glitches. The vsync irq must still be left enabled otherwise the RDMA modules isn't trigerred when the interrupt line is masked. Signed-off-by: Neil Armstrong Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-10-narmstrong@baylibre.com

drm/meson: hold 32 lines after vsync to give time for AFBC start

2019-12-10T09:09:56+00:00

When using an AFBC encoded frame, the AFBC Decoder must be reset, configured and enabled at each vsync IRQ. To leave time for that, use the maximum lines hold time to give time for AFBC setup and avoid visual glitches. Signed-off-by: Neil Armstrong Reviewed-by: Kevin Hilman [narmstrong: fix typo in commit log] Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-9-narmstrong@baylibre.com

drm/meson: viu: add AFBC modules routing functions

2019-12-10T09:09:38+00:00

The Amlogic G12A AFBC Decoder pixel input need to be routed diferently than the Amlogic GXM AFBC decoder, this adds support for routing the VIU OSD1 pixel source to the AFBC "Mali Unpack" module. This "Mali Unpack" module is also configured with a static RGBA mapping for now until we support more pixel formats. Signed-off-by: Neil Armstrong Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-8-narmstrong@baylibre.com

drm/meson: plane: add support for AFBC mode for OSD1 plane

2019-12-10T09:09:24+00:00

This adds all the OSD configuration plumbing to support the AFBC decoders path to display of the OSD1 plane. The Amlogic GXM and G12A AFBC decoders are integrated very differently. The Amlogic GXM has a direct output path to the OSD1 VIU pixel input, because the GXM AFBC decoder seem to be a custom IP developed by Amlogic. On the other side, the Amlogic G12A AFBC decoder seems to be an external IP that emit pixels on an AXI master hooked to a "Mali Unpack" block feeding the OSD1 VIU pixel input. This uses a weird "0x1000000" internal HW physical address on both sides to transfer the pixels. For Amlogic GXM, the supported pixel formats are the same as the normal linear OSD1 mode. On the other side, Amlogic added support for all AFBC v1.2 formats for the G12A AFBC integration. For simplicity, we stick to the already supported formats for now. Signed-off-by: Neil Armstrong Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-7-narmstrong@baylibre.com

drm/meson: Add AFBCD module driver

2019-12-10T09:09:01+00:00

This adds the driver for the ARM Framebuffer Compression decoders found in the Amlogic GXM and G12A SoCs. The Amlogic GXM and G12A AFBC decoder are totally different, the GXM only handling only the AFBC v1.0 modes and the G12A decoder handling the AFBC v1.2 modes. The G12A AFBC decoder is an external IP integrated in the video pipeline, and the GXM AFBC decoder seems to the an Amlogic custom decoder more tighly integrated in the video pipeline. The GXM AFBC decoder can handle only one AFBC plane for 2 available OSD planes available in HW, and the G12A AFBC decoder can handle up to 4 AFBC planes for up to 3 OSD planes available in HW. The Amlogic GXM supports 16x16 SPARSE and 16x16 SPLIT AFBC buffers up to 4k. On the other side, for G12A SPLIT is mandatory in 16x16 block mode, but for 4k modes 32x8+SPLIT AFBC buffers is manadatory for performances reasons. The RDMA is used here to reset and program the AFBC decoder unit on each vsync without involving the interrupt handler that can be masked for a long period of time, producing display glitches. For this we use the meson_rdma_writel_sync() which adds the register write tuple (VPU register offset and register value) to the RDMA buffer and write the value to the HW. When enabled, the RDMA is enabled to rewrite the same sequence at the next VSYNC event, until a new buffer is committed to the OSD plane. Then the Amlogic G12A is switched to RDMA, the Amlogic GXM Decoder doesn't need a reset/reprogram at each vsync, but needs to keep the vsync interrupt enabled to trigger the RDMA module. Signed-off-by: Neil Armstrong Reviewed-by: Kevin Hilman [narmstrong: fixed typo in commit log] Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-6-narmstrong@baylibre.com

drm/meson: add RDMA module driver

2019-12-10T09:08:45+00:00

The VPU embeds a "Register DMA" that can write a sequence of registers on the VPU AHB bus, either manually or triggered by an internal IRQ event like VSYNC or a line input counter. The initial implementation handles a single channel (over 8), triggered by the VSYNC irq and does not handle the RDMA irq. The RDMA will be usefull to reset and program the AFBC decoder unit on each vsync without involving the interrupt handler that can be masked for a log period of time, producing display glitches. Signed-off-by: Neil Armstrong Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-5-narmstrong@baylibre.com