talos-op-linux/drivers/acpi/cppc_acpi.c, branch v4.8.5

ACPI / CPPC: Prevent cpc_desc_ptr points to the invalid data

2016-06-25T00:53:31+00:00

When CPPC fails to request a PCC channel, the CPC data is freed and cpc_desc_ptr points to the invalid data. Avoid this issue by moving the cpc_desc_ptr assignment after the PCC channel request. Signed-off-by: Hoan Tran Acked-by: Ashwin Chaugule Signed-off-by: Rafael J. Wysocki

ACPI: CPPC: Return error if _CPC is invalid on a CPU

2016-06-23T21:19:21+00:00

Based on 8.4.7.1 section of ACPI 6.1 specification, if the platform supports CPPC, the _CPC object must exist under all processor objects. If cpc_desc_ptr pointer is invalid on any CPUs, acpi_get_psd_map() should return error and CPPC cpufreq driver can not be registered. Signed-off-by: Hoan Tran Reviewed-by: Prashanth Prakash Signed-off-by: Rafael J. Wysocki

ACPI / CPPC: use MRTT/MPAR to decide if/when a req can be sent

2016-03-09T22:35:29+00:00

The ACPI spec defines Minimum Request Turnaround Time(MRTT) and Maximum Periodic Access Rate(MPAR) to prevent the OSPM from sending too many requests than the platform can handle. For further details on these parameters please refer to section 14.1.3 of ACPI 6.0 spec. This patch includes MRTT/MPAR in deciding if or when a CPPC request can be sent to the platform to make sure CPPC implementation is compliant to the spec. Signed-off-by: Prashanth Prakash Acked-by: Ashwin Chaugule Signed-off-by: Rafael J. Wysocki

ACPI / CPPC: replace writeX/readX to PCC with relaxed version

2016-03-09T22:35:29+00:00

We do not have a strict read/write order requirement while accessing PCC subspace. The only requirement is all access should be committed before triggering the PCC doorbell to transfer the ownership of PCC to the platform and this requirement is enforced by the PCC driver. Profiling on a many core system shows improvement of about 1.8us on average per freq change request(about 10% improvement on average). Since these operations are executed while holding the pcc_lock, reducing this time helps the CPPC implementation to scale much better as the number of cores increases. Signed-off-by: Prashanth Prakash Acked-by: Ashwin Chaugule Signed-off-by: Rafael J. Wysocki

ACPI / CPPC: optimized cpc_read and cpc_write

2016-03-09T22:35:29+00:00

cpc_read and cpc_write are used while holding the pcc_lock spin_lock, so they need to be as fast as possible. acpi_os_read/write_memory APIs linearly search through a list for cached mapping which is quite expensive. Since the PCC subspace is already mapped into virtual address space during initialization, we can just add the offset and access the necessary CPPC registers. This patch + similar changes to PCC driver reduce the time per freq. transition from around 200us to about 20us for the CPPC cpufreq driver. Signed-off-by: Prashanth Prakash Acked-by: Ashwin Chaugule Signed-off-by: Rafael J. Wysocki

ACPI / CPPC: Optimize PCC Read Write operations

2016-03-09T22:35:28+00:00

Previously the send_pcc_cmd() code checked if the PCC operation had completed before returning from the function. This check was performed regardless of the PCC op type (i.e. Read/Write). Knowing the type of cmd can be used to optimize the check and avoid needless waiting. e.g. with Write ops, the actual Writing is done before calling send_pcc_cmd(). And the subsequent Writes will check if the channel is free at the entry of send_pcc_cmd() anyway. However, for Read cmds, we need to wait for the cmd completion bit to be flipped, since the actual Read ops follow after returning from the send_pcc_cmd(). So, only do the looping check at the end for Read ops. Also, instead of using udelay() calls, use ktime as a means to check for deadlines. The current deadline in which the Remote should flip the cmd completion bit is defined as N * Nominal latency. Where N is arbitrary and large enough to work on slow emulators and Nominal latency comes from the ACPI table (PCCT). This helps in working around the CONFIG_HZ effects on udelay() and also avoids needing different ACPI tables for Silicon and Emulation platforms. Signed-off-by: Ashwin Chaugule Signed-off-by: Prashanth Prakash Signed-off-by: Rafael J. Wysocki

Merge branches 'pm-cpufreq' and 'acpi-cppc'

2015-11-20T00:22:10+00:00

* pm-cpufreq: Revert "Documentation: kernel_parameters for Intel P state driver" cpufreq: mediatek: fix build error cpufreq: intel_pstate: Add separate support for Airmont cores cpufreq: intel_pstate: Replace BYT with ATOM Revert "cpufreq: intel_pstate: Use ACPI perf configuration" Revert "cpufreq: intel_pstate: Avoid calculation for max/min" * acpi-cppc: ACPI / CPPC: Use h/w reduced version of the PCCT structure

ACPI / CPPC: Use h/w reduced version of the PCCT structure

2015-11-13T23:00:38+00:00

CPPC is enabled only on platforms which support the h/w reduced ACPI specification, so use the h/w reduced version of the PCCT consistently when deferencing PCCT contents. Fixes: 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) Signed-off-by: Ashwin Chaugule Signed-off-by: Rafael J. Wysocki

ACPI / CPPC: Fix potential memory leak

2015-10-26T03:47:02+00:00

Commit 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) leads to the following static checker warning: drivers/acpi/cppc_acpi.c:527 acpi_cppc_processor_probe() warn: overwrite may leak 'cpc_ptr' Fix the warning by removing the bogus per-CPU pointer dereference. Fixes: 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) Reported-by: Dan Carpenter Signed-off-by: Ashwin Chaugule Signed-off-by: Rafael J. Wysocki

ACPI / CPPC: signedness bug in register_pcc_channel()

2015-10-26T03:44:17+00:00

The "pcc_subspace_idx" is -1 if it hasn't been initialized yet. We need it to be signed. Fixes: 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) Signed-off-by: Dan Carpenter Acked-by: Ashwin Chaugule Signed-off-by: Rafael J. Wysocki