Talos™ II Linux sources for OpenPOWER https://git.raptorcs.com/git/talos-op-linux/atom?h=v4.4.4 2015-03-20T01:54:49+00:00 2015-03-20T01:54:49+00:00 David Ahern david.ahern@oracle.com 2015-03-19T20:06:37+00:00 urn:sha1:b5aff55d89c27aedcae9521155b81b6aebb6c5d8 The M7 processor has a different hypervisor group id and different PCR fast trap values. PIC read/write functions and PCR bit fields are the same as the T4 so those are reused. Signed-off-by: David Ahern <david.ahern@oracle.com> Acked-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net> 2014-09-17T01:26:40+00:00 bob picco bpicco@meloft.net 2014-09-16T14:09:06+00:00 urn:sha1:05aa1651e8b9ca078b1808a2fe7b50703353ec02 The T5 (niagara5) has different PCR related HV fast trap values and a new HV API Group. This patch utilizes these and shares when possible with niagara4. We use the same sparc_pmu niagara4_pmu. Should there be new effort to obtain the MCU perf statistics then this would have to be changed. Cc: sparclinux@vger.kernel.org Signed-off-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net> 2014-05-19T02:01:29+00:00 Sam Ravnborg sam@ravnborg.org 2014-05-16T21:25:50+00:00 urn:sha1:f05a68653e56ca2f23bccf7e50be69486886f052 Drop extern for all prototypes and adjust alignment of parameters as required after the removal. In a few rare cases adjust linelength to conform to maximum 80 chars, and likewise in a few rare cases adjust alignment of parameters to static functions. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net> 2012-08-19T06:03:53+00:00 David S. Miller davem@davemloft.net 2012-08-17T03:35:41+00:00 urn:sha1:8c79bfa51101354853f0f5d3b02435cec429da51 Unlike for previous chips, access to the perf-counter control registers are all hyper-privileged. Therefore, access to them must go through a hypervisor interface. Signed-off-by: David S. Miller <davem@davemloft.net> 2011-08-03T04:28:52+00:00 David S. Miller davem@davemloft.net 2011-08-02T06:27:17+00:00 urn:sha1:ea5e7447ea9d555558e0f13798f5143dd51a915a Signed-off-by: David S. Miller <davem@davemloft.net> 2011-08-03T04:28:51+00:00 David S. Miller davem@davemloft.net 2011-08-02T05:45:18+00:00 urn:sha1:e2eb9f8158ead43a88c0f0b4d74257b1be938a18 Signed-off-by: David S. Miller <davem@davemloft.net> 2011-07-28T03:43:51+00:00 David S. Miller davem@davemloft.net 2011-07-28T03:42:51+00:00 urn:sha1:15e3608d7c273947dbf2eadbcaa66e51143928fb Signed-off-by: David S. Miller <davem@davemloft.net> 2011-03-31T14:26:23+00:00 Lucas De Marchi lucas.demarchi@profusion.mobi 2011-03-31T01:57:33+00:00 urn:sha1:25985edcedea6396277003854657b5f3cb31a628 Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi> 2008-12-04T17:17:09+00:00 David S. Miller davem@davemloft.net 2008-11-28T10:26:55+00:00 urn:sha1:3178a07c33747305b7f7140bd55b0f77e7f239eb Signed-off-by: David S. Miller <davem@davemloft.net> 2008-07-27T21:00:59+00:00 Sam Ravnborg sam@ravnborg.org 2008-07-27T21:00:59+00:00 urn:sha1:a439fe51a1f8eb087c22dd24d69cebae4a3addac The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>