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<title>talos-op-linux/arch/arm/plat-iop/setup.c, branch master</title>
<subtitle>Talos™ II Linux sources for OpenPOWER</subtitle>
<id>https://git.raptorcs.com/git/talos-op-linux/atom?h=master</id>
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<updated>2019-08-14T13:36:22+00:00</updated>
<entry>
<title>ARM: iop32x: merge everything into mach-iop32x/</title>
<updated>2019-08-14T13:36:22+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-08-09T16:33:21+00:00</published>
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<id>urn:sha1:a1f487d75c9be17421f1ab10172427dd16e5f56a</id>
<content type='text'>
Various bits of iop32x are now in their traditional locations in plat-iop,
mach-iop/include/mach/ and in include/asm/mach/hardware. As nothing
outside of the iop32x mach code references these any more, this can all
be moved into one place now.

The only remaining things in the include/mach/ directory are now the
NR_IRQS definition, the entry-macros.S file and the the decompressor
uart access. After the irqchip code has been converted to SPARSE_IRQ
and GENERIC_IRQ_MULTI_HANDLER, it can be moved to ARCH_MULTIPLATFORM.

Link: https://lore.kernel.org/r/20190809163334.489360-7-arnd@arndb.de
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500</title>
<updated>2019-06-19T15:09:55+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-04T08:11:33+00:00</published>
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<id>urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520</id>
<content type='text'>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: iop: Fix indentation</title>
<updated>2016-07-07T16:06:40+00:00</updated>
<author>
<name>Jungseung Lee</name>
<email>js07.lee@samsung.com</email>
</author>
<published>2016-07-07T16:00:20+00:00</published>
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<id>urn:sha1:6176d8efb8583ed40113287d63b46cf3aa8f67be</id>
<content type='text'>
Fix indentation in iop3xx_std_desc

Signed-off-by: Jungseung Lee &lt;js07.lee@samsung.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: iop3xx: use fixed PCI i/o mapping</title>
<updated>2012-07-26T14:10:04+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2012-07-04T16:18:40+00:00</published>
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<id>urn:sha1:dd9bf78040fa0da4cecc228e1682b9682b8cb180</id>
<content type='text'>
Move iop33x and iop32x PCI to fixed i/o mapping and remove io.h. This
changes the PCI bus addresses from the cpu address to 0 based. It appears
that there is translation h/w for this, but its untested.

Not sure what to do with io_offset. I think it should always be 0.
AFAICT, PCI setup is skipped if the ATU is already setup.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Nicolas Pitre has a new email address</title>
<updated>2009-09-15T16:37:12+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nico@fluxnic.net</email>
</author>
<published>2009-09-14T07:25:28+00:00</published>
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<id>urn:sha1:2f82af08fcc7dc01a7e98a49a5995a77e32a2925</id>
<content type='text'>
Due to problems at cam.org, my nico@cam.org email address is no longer
valid.  FRom now on, nico@fluxnic.net should be used instead.

Signed-off-by: Nicolas Pitre &lt;nico@fluxnic.net&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>[ARM] iop: iop3xx needs registers mapped uncached+unbuffered</title>
<updated>2008-11-09T11:18:36+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk@dyn-67.arm.linux.org.uk</email>
</author>
<published>2008-11-09T11:18:36+00:00</published>
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<id>urn:sha1:ebb4c65869db7213280ad9c510637683939b5ff8</id>
<content type='text'>
Mikael Pettersson reported:

   The 2.6.28-rc kernels fail to detect PCI device 0000:00:01.0
   (the first ethernet port) on my Thecus n2100 XScale box.

   There is however still a strange "ghost" device that gets partially
   detected in 2.6.28-rc2 vanilla.

The IOP321 manual says:

  The user designates the memory region containing the OCCDR as
  non-cacheable and non-bufferable from the IntelR XScaleTM core.
  This guarantees that all load/stores to the OCCDR are only of
  DWORD quantities.

Ensure that the OCCDR is so mapped.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>[ARM] 3818/1: iop3xx: introduce arch/arm/plat-iop for shared iop32x/iop33x code</title>
<updated>2006-09-25T09:25:37+00:00</updated>
<author>
<name>Lennert Buytenhek</name>
<email>buytenh@wantstofly.org</email>
</author>
<published>2006-09-18T22:12:53+00:00</published>
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<id>urn:sha1:7ae1f7ec525c32db441836ab0ab010b85cb819a2</id>
<content type='text'>
Introduce the arch/arm/plat-iop directory, for code shared between the
iop32x and iop33x, and move the common memory map setup bits there.

Signed-off-by: Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
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