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<title>talos-op-linux/arch/arm/kvm/hyp, branch master</title>
<subtitle>Talos™ II Linux sources for OpenPOWER</subtitle>
<id>https://git.raptorcs.com/git/talos-op-linux/atom?h=master</id>
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<updated>2019-06-19T15:09:07+00:00</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234</title>
<updated>2019-06-19T15:09:07+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-03T05:44:50+00:00</published>
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<id>urn:sha1:caab277b1de0a22b675c4c95fc7b285ec2eb5bf5</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 503 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 266</title>
<updated>2019-06-05T15:30:28+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-29T14:12:40+00:00</published>
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<id>urn:sha1:d94d71cb45fda694a7189839f1c6aacb4f615f95</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation 51 franklin street fifth floor boston ma 02110
  1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 67 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141333.953658117@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Move cc/it checks under hyp's Makefile to avoid instrumentation</title>
<updated>2019-05-24T13:53:20+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2019-05-22T17:47:05+00:00</published>
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<id>urn:sha1:623e1528d4090bd1abaf93ec46f047dee9a6fb32</id>
<content type='text'>
KVM has helpers to handle the condition codes of trapped aarch32
instructions. These are marked __hyp_text and used from HYP, but they
aren't built by the 'hyp' Makefile, which has all the runes to avoid ASAN
and KCOV instrumentation.

Move this code to a new hyp/aarch32.c to avoid a hyp-panic when starting
an aarch32 guest on a host built with the ASAN/KCOV debug options.

Fixes: 021234ef3752f ("KVM: arm64: Make kvm_condition_valid32() accessible from EL2")
Fixes: 8cebe750c4d9a ("arm64: KVM: Make kvm_skip_instr32 available to HYP")
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Factor out VMID into struct kvm_vmid</title>
<updated>2019-02-19T21:05:35+00:00</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@arm.com</email>
</author>
<published>2018-12-11T14:26:31+00:00</published>
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<id>urn:sha1:e329fb75d519e3dc3eb11b22d5bb846516be3521</id>
<content type='text'>
In preparation for nested virtualization where we are going to have more
than a single VMID per VM, let's factor out the VMID data into a
separate VMID data structure and change the VMID allocator to operate on
this new structure instead of using a struct kvm.

This also means that udate_vttbr now becomes update_vmid, and that the
vttbr itself is generated on the fly based on the stage 2 page table
base address and the vmid.

We cache the physical address of the pgd when allocating the pgd to
avoid doing the calculation on every entry to the guest and to avoid
calling into potentially non-hyp-mapped code from hyp/EL2.

If we wanted to merge the VMID allocator with the arm64 ASID allocator
at some point in the future, it should actually become easier to do that
after this patch.

Note that to avoid mapping the kvm_vmid_bits variable into hyp, we
simply forego the masking of the vmid value in kvm_get_vttbr and rely on
update_vmid to always assign a valid vmid value (within the supported
range).

Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
[maz: minor cleanups]
Reviewed-by: Julien Thierry &lt;julien.thierry@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm/arm64: KVM: Statically configure the host's view of MPIDR</title>
<updated>2019-02-19T21:05:35+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2019-01-19T15:29:54+00:00</published>
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<id>urn:sha1:32f139551954512bfdf9d558341af453bb8b12b4</id>
<content type='text'>
We currently eagerly save/restore MPIDR. It turns out to be
slightly pointless:
- On the host, this value is known as soon as we're scheduled on a
  physical CPU
- In the guest, this value cannot change, as it is set by KVM
  (and this is a read-only register)

The result of the above is that we can perfectly avoid the eager
saving of MPIDR_EL1, and only keep the restore. We just have
to setup the host contexts appropriately at boot time.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Teach some form of type-safety to kvm_call_hyp</title>
<updated>2019-02-19T21:05:34+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2019-01-11T14:57:58+00:00</published>
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<id>urn:sha1:d18232ea8a9480606c53e91d7e2d062c3c151815</id>
<content type='text'>
Just like on arm64, and for the same reasons, kvm_call_hyp removes
any form of type safety when calling into HYP. But we can still
try to tell the compiler what we're trying to achieve.

Here, we can add code that would do the function call if it wasn't
guarded by an always-false predicate. Hopefully, the compiler is
dumb enough to do the type checking and clever enough to not emit
the corresponding code...

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: port KCOV to arm</title>
<updated>2018-06-14T22:55:24+00:00</updated>
<author>
<name>Dmitry Vyukov</name>
<email>dvyukov@google.com</email>
</author>
<published>2018-06-14T22:27:44+00:00</published>
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<id>urn:sha1:758517202bd2e427664857c9f2aa59da36848aca</id>
<content type='text'>
KCOV is code coverage collection facility used, in particular, by
syzkaller system call fuzzer.  There is some interest in using syzkaller
on arm devices.  So port KCOV to arm.

On implementation level this merely declares that KCOV is supported and
disables instrumentation of 3 special cases.  Reasons for disabling are
commented in code.

Tested with qemu-system-arm/vexpress-a15.

Link: http://lkml.kernel.org/r/20180511143248.112484-1-dvyukov@google.com
Signed-off-by: Dmitry Vyukov &lt;dvyukov@google.com&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Russell King &lt;linux@armlinux.org.uk&gt;
Cc: Abbott Liu &lt;liuwenliang@huawei.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Koguchi Takuo &lt;takuo.koguchi.sw@hitachi.com&gt;
Cc: &lt;syzkaller@googlegroups.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Merge branches 'fixes', 'misc' and 'spectre' into for-linus</title>
<updated>2018-06-05T09:03:27+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2018-06-05T09:03:27+00:00</published>
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<id>urn:sha1:0ac000e86703dedea1000513dbb8a64d02930668</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARM: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling</title>
<updated>2018-05-31T10:09:03+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2018-05-15T16:04:10+00:00</published>
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<id>urn:sha1:b800acfc70d9fb81fbd6df70f2cf5e20f70023d0</id>
<content type='text'>
We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible.
So let's intercept it as early as we can by testing for the
function call number as soon as we've identified a HVC call
coming from the guest.

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Boot-tested-by: Tony Lindgren &lt;tony@atomide.com&gt;
Reviewed-by: Tony Lindgren &lt;tony@atomide.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: invalidate icache on guest exit for Cortex-A15</title>
<updated>2018-05-31T10:09:03+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2018-02-01T11:07:38+00:00</published>
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<id>urn:sha1:0c47ac8cd157727e7a532d665d6fb1b5fd333977</id>
<content type='text'>
In order to avoid aliasing attacks against the branch predictor
on Cortex-A15, let's invalidate the BTB on guest exit, which can
only be done by invalidating the icache (with ACTLR[0] being set).

We use the same hack as for A12/A17 to perform the vector decoding.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Boot-tested-by: Tony Lindgren &lt;tony@atomide.com&gt;
Reviewed-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
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