talos-op-linux/Documentation/devicetree/bindings/arm/gic.txt, branch master

dt-bindings: consolidate interrupt controller bindings

2015-10-22T14:21:25+00:00

Move various interrupt controller bindings into the interrupt-controller/ directory. Signed-off-by: Rob Herring Cc: Matthias Brugger Cc: linux-mediatek@lists.infradead.org

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2015-04-22T16:09:46+00:00

Pull ARM DT updates from Olof Johansson: "As always, this tends to be one of our bigger branches. There are lots of updates this release, but not that many jumps out as something that needs more detailed coverage. Some of the highlights are: - DTs for the new Annapurna Labs Alpine platform - more graphics DT pieces falling into place on Exynos, bridges, clocks. - plenty of DT updates for Qualcomm platforms for various IP blocks - some churn on Tegra due to switch-over to tool-generated pinctrl data - misc fixes and updates for Atmel at91 platforms - various DT updates to add IP block support on Broadcom's Cygnus platforms - more updates for Renesas platforms as DT support is added for various IP blocks (IPMMU, display, audio, etc)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits) ARM: dts: alpine: add internal pci Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135." ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB ARM: dts: qcom: Add idle state device nodes for 8064 ARM: dts: qcom: Add idle states device nodes for 8084 ARM: dts: qcom: Add idle states device nodes for 8974/8074 ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs devicetree: bindings: Document qcom,idle-states devicetree: bindings: Update qcom,saw2 node bindings dt-bindings: Add #defines for MSM8916 clocks and resets arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974 arm: dts: qcom: Add LCC nodes arm: dts: qcom: Add TCSR support for MSM8960 arm: dts: qcom: Add TCSR support for MSM8660 arm: dts: qcom: Add TCSR support for IPQ8064 ...

arm: qcom: dts: gic: add compatible string for Qualcomm MSM GICs

2015-04-03T20:33:42+00:00

Document the Qualcomm MSM GICs implementation as compatible with the ARM GIC standard. Signed-off-by: Kumar Gala Signed-off-by: Olof Johansson

DT: arm,gic: kill arm,routable-irqs

2015-03-15T00:56:02+00:00

Nobody will regret it. Acked-by: Tony Lindgren Signed-off-by: Marc Zyngier Link: https://lkml.kernel.org/r/1426088629-15377-6-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper

irqchip: gic: Allow interrupt level to be set for PPIs

2015-01-26T10:38:23+00:00

During a recent cleanup of the arm64 DTs it has become clear that the handling of PPIs in xxxx_set_type() is incorrect. The ARM TRMs for GICv2 and later allow for "implementation defined" support for setting the edge or level type of the PPI interrupts and don't restrict the activation level of the signal. Current ARM implementations do restrict the PPI level type to IRQ_TYPE_LEVEL_LOW, but licensees of the IP can decide to shoot themselves in the foot at any time. Signed-off-by: Liviu Dudau Acked-by: Marc Zyngier Cc: LAKML Cc: Russell King Cc: Rob Herring Cc: Mark Rutland Cc: Ian Campbell Cc: Jason Cooper Cc: Haojian Zhuang Link: http://lkml.kernel.org/r/1421772779-25764-1-git-send-email-Liviu.Dudau@arm.com Signed-off-by: Thomas Gleixner

Merge branch 'irq-irqdomain-arm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2014-12-16T01:30:09+00:00

Pull irq domain ARM updates from Thomas Gleixner: "This set of changes make use of hierarchical irqdomains to provide: - MSI/ITS support for GICv3 - MSI support for GICv2m - Interrupt polarity extender for GICv1 Marc has come more cleanups for the existing extension hooks of GIC in the pipeline, but they are going to be 3.20 material" * 'irq-irqdomain-arm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (22 commits) irqchip: gicv3-its: Fix ITT allocation irqchip: gicv3-its: Move some alloc/free code to activate/deactivate irqchip: gicv3-its: Fix domain free in multi-MSI case irqchip: gic: Remove warning by including linux/irqdomain.h irqchip: gic-v2m: Add DT bindings for GICv2m irqchip: gic-v2m: Add support for ARM GICv2m MSI(-X) doorbell irqchip: mtk-sysirq: dt-bindings: Add bindings for mediatek sysirq irqchip: mtk-sysirq: Add sysirq interrupt polarity support irqchip: gic: Support hierarchy irq domain. irqchip: GICv3: Binding updates for ITS irqchip: GICv3: ITS: enable compilation of the ITS driver irqchip: GICv3: ITS: plug ITS init into main GICv3 code irqchip: GICv3: ITS: DT probing and initialization irqchip: GICv3: ITS: MSI support irqchip: GICv3: ITS: device allocation and configuration irqchip: GICv3: ITS: tables allocators irqchip: GICv3: ITS: LPI allocator irqchip: GICv3: ITS: irqchip implementation irqchip: GICv3: ITS command queue irqchip: GICv3: rework redistributor structure ...

irqchip: gic-v2m: Add DT bindings for GICv2m

2014-11-26T15:55:19+00:00

Update the GIC DT bindings to support GICv2m. Signed-off-by: Suravee Suthikulpanit [maz: split DT patch from main driver, updated changelog] Signed-off-by: Marc Zyngier Link: https://lkml.kernel.org/r/1416941243-7181-3-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper

ARM: realview: add device tree and bindings for PB1176

2014-10-22T11:49:04+00:00

As a first example, add device tree and bindings for the RealView PB1176. Signed-off-by: Linus Walleij

ARM: brcmstb: gic: add compatible string for Broadcom Brahma15

2014-07-28T14:01:28+00:00

Document the Broadcom Brahma B15 GIC implementation as compatible with the ARM GIC standard. Signed-off-by: Marc Carino Acked-by: Florian Fainelli Acked-by: Arnd Bergmann Signed-off-by: Brian Norris Signed-off-by: Matt Porter

DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs

2014-02-05T14:38:00+00:00

In some socs the gic can be preceded by a crossbar IP which routes the peripheral interrupts to the gic inputs. The peripheral interrupts are associated with a fixed crossbar input line and the crossbar routes that to one of the free gic input line. The DT entries for peripherals provides the fixed crossbar input line as its interrupt number and the mapping code should associate this with a free gic input line. This patch adds the support inside the gic irqchip to handle such routable irqs. The routable irqs are registered in a linear domain. The registered routable domain's callback should be implemented to get a free irq and to configure the IP to route it. Cc: Thomas Gleixner Cc: Linus Walleij Cc: Santosh Shilimkar Cc: Russell King Cc: Tony Lindgren Cc: Rajendra Nayak Cc: Marc Zyngier Cc: Grant Likely Cc: Rob Herring Signed-off-by: Sricharan R Reviewed-by: Thomas Gleixner Acked-by: Santosh Shilimkar Acked-by: Linus Walleij