Talos™ II Linux sources for OpenPOWER https://git.raptorcs.com/git/talos-op-linux/atom?h=master 2019-06-19T17:31:21+00:00 2019-06-19T17:31:21+00:00 Gavin Schenk g.schenk@eckelmann.de 2019-06-18T06:04:12+00:00 urn:sha1:75d7627f49c54e2eed4b785112d0104e2954d27c Due to new challenges in my life I can no longer take care of SIOX. Thorsten takes over my SIOX tasks. Signed-off-by: Gavin Schenk <g.schenk@eckelmann.de> Acked-by: Thorsten Scherer <t.scherer@eckelmann.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2017-12-19T08:26:00+00:00 Uwe Kleine-König u.kleine-koenig@pengutronix.de 2017-12-18T16:59:07+00:00 urn:sha1:bbecb07fa0af9a41507ce06d4631fdb3b5059417 SIOX is a bus system invented at Eckelmann AG to control their building management and refrigeration systems. Traditionally the bus was implemented on custom microcontrollers, today Linux based machines are in use, too. The topology on a SIOX bus looks as follows: ,------->--DCLK-->---------------+----------------------. ^ v v ,--------. ,----------------------. ,------ | | | ,--------------. | | | |--->--DOUT-->---|->-|shift register|->-|--->---| | | | `--------------' | | | master | | device | | device | | | ,--------------. | | | |---<--DIN---<---|-<-|shift register|-<-|---<---| | | | `--------------' | | `--------' `----------------------' `------ v ^ ^ `----------DLD-------------------+----------------------' There are two control lines (DCLK and DLD) driven from the bus master to all devices in parallel and two daisy chained data lines, one for input and one for output. DCLK is the clock to shift both chains by a single bit. On an edge of DLD the devices latch both their input and output shift registers. This patch adds a framework for this bus type. Acked-by: Gavin Schenk <g.schenk@eckelmann.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>