/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: src/occ_gpe0/link.cmd $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ /* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ /* You may obtain a copy of the License at */ /* */ /* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ /* Unless required by applicable law or agreed to in writing, software */ /* distributed under the License is distributed on an "AS IS" BASIS, */ /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ /* implied. See the License for the specific language governing */ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ // Need to do this so that elf32-powerpc is not modified! #undef powerpc #ifndef INITIAL_STACK_SIZE #define INITIAL_STACK_SIZE 256 #endif OUTPUT_FORMAT(elf32-powerpc); // Shared data segment starts at 0xfff00000 and is 4kb, so GPE0 // is loaded at 0xfff01000 #define SRAM_START 0xfff01000 #define SRAM_LENGTH 0xF000 // Exception vectors #define PPE_DEBUG_PTRS_OFFSET 0x180 MEMORY { sram : ORIGIN = SRAM_START, LENGTH = SRAM_LENGTH } // This symbol is only needed by external debug tools, so add this command // to ensure that table is pulled in by the linker even though PPE code // never references it. EXTERN(pk_debug_ptrs); SECTIONS { . = SRAM_START; . = ALIGN(512); _VECTOR_START = .; __START_ADDR__ = .; .vectors _VECTOR_START : { *(.vectors) } > sram /////////////////////////////////////////////////////////////////////////// // Debug Pointers Table // // We want the debug pointers table to always appear at // PPE_DEBUG_PTRS_OFFSET from the IVPR address. /////////////////////////////////////////////////////////////////////////// _DEBUG_PTRS_START = _VECTOR_START + PPE_DEBUG_PTRS_OFFSET; .debug_ptrs _DEBUG_PTRS_START : { *(.debug_ptrs) } > sram //////////////////////////////// // All non-vector code goes here //////////////////////////////// .text : { *(.text*) . = ALIGN(128); } > sram //////////////////////////////// // Read-only Data //////////////////////////////// _RODATA_SECTION_BASE = .; // SDA2 constant sections .sdata2 and .sbss2 must be adjacent to each // other. Our SDATA sections are small so we'll use strictly positive // offsets. _SDA2_BASE_ = .; .sdata2 . : { *(.sdata2* ) . = ALIGN(128); } > sram .sbss2 . : { *(.sbss2* ) . = ALIGN(128); } > sram // Other read-only data. .rodata . : { *(.rodata*) *(.got2*) . = ALIGN(128); } > sram __READ_ONLY_DATA_LEN__ = . - _RODATA_SECTION_BASE; __WRITEABLE_DATA_ADDR__ = .; __WRITEABLE_DATA_LEN__ = . - __WRITEABLE_DATA_ADDR__; //////////////////////////////// // Read-write Data //////////////////////////////// _DATA_SECTION_BASE = .; // SDA sections .sdata and .sbss must be adjacent to each // other. Our SDATA sections are small so we'll use strictly positive // offsets. _SDA_BASE_ = .; .sdata . : { *(.sdata*) . = ALIGN(128); } > sram .sbss . : { *(.sbss.debug) *(.sbss*) . = ALIGN(128); } > sram // Other read-write data // It's not clear why boot.S is generating empty .glink,.iplt .rela . : { *(.rela*) . = ALIGN(128); } > sram .rwdata . : { *(.data*) *(.bss*) . = ALIGN(128); } > sram // .iplt . : { *(.iplt) ALIGN(128); } > sram _PK_INITIAL_STACK_LIMIT = .; . = . + INITIAL_STACK_SIZE; _PK_INITIAL_STACK = . - 1; }