/* IBM_PROLOG_BEGIN_TAG                                                   */
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/* $Source: src/lib/ppc405lib/lfsr.h $                                    */
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/* OpenPOWER OnChipController Project                                     */
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/* [+] International Business Machines Corp.                              */
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/* IBM_PROLOG_END_TAG                                                     */
#ifndef __LFSR_H__
#define __LFSR_H__

/// \file lfsr.h
/// \brief Linear-Feedback Shift Register Implementations
///
/// The 32- and 64-bit pseudo-random number generators in this library are of
/// the linear-conguential type. These maximal-length LFSR pseudo-random
/// sequence generators are also provided.

/// 64-bit LFSR
///
/// \param[in,out] io_seed The input seed is converted in one step to the
/// output seed.
///
/// This 64-bit LFSR uses taps 64, 63, 61, and 60. In big-endian numbering
/// these are bits 0, 1, 3 and 4.  This LFSR is also implemented for the PORE
/// engines in the file pore_rand.pS.
void
_lfsr64(uint64_t* io_seed);

#endif // __LFSR_H__