From dadf2726aa024c7100fe295af78bdfc2e88fb7ef Mon Sep 17 00:00:00 2001 From: Zane Shelley Date: Tue, 6 Jun 2017 10:14:14 -0500 Subject: FIRDATA: updates to FIRDATA constants Change-Id: I4207cf6d9ac85ecbb16f04263ca57a8c61d6d1f5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41279 Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa Reviewed-by: Benjamin J. Weisenbeck Reviewed-by: Caleb N. Palmer Reviewed-by: Martha Broyles Reviewed-by: William A. Bryan --- src/occ_405/firdata/firData.c | 85 ++++++++++++++-------------- src/occ_405/firdata/firDataConst_common.h | 92 +++++++++++++++++++++++-------- src/occ_405/firdata/homerData_common.h | 8 +-- src/occ_405/firdata/native.c | 10 +++- src/occ_405/firdata/native.h | 6 +- src/occ_405/firdata/pnorData_common.h | 11 ++-- src/occ_405/firdata/pnor_util.c | 2 +- src/occ_405/firdata/scom_trgt.c | 56 +++++++++---------- src/occ_405/firdata/scom_util.c | 12 ++-- src/occ_405/occLinkInputFile | 11 +++- src/occ_405/topfiles.mk | 8 ++- 11 files changed, 186 insertions(+), 115 deletions(-) (limited to 'src') diff --git a/src/occ_405/firdata/firData.c b/src/occ_405/firdata/firData.c index e9b60a6..07d7703 100644 --- a/src/occ_405/firdata/firData.c +++ b/src/occ_405/firdata/firData.c @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/firData.C $ */ +/* $Source: src/occ_405/firdata/firData.c $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -55,7 +55,7 @@ typedef struct PNOR_Data_t * pData; /*/< Pointer to the PNOR header data */ uint32_t pBufSize; /*/< Current size of the PNOR data buffer */ - FirData_ListPointers_t hPtrs[MAX_TRGTS]; /*/< Pointers to the register lists */ + FirData_ListPointers_t hPtrs[TRGT_MAX]; /*/< Pointers to the register lists */ } FirData_t; @@ -204,7 +204,7 @@ bool FirData_addGlblsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt, bool full = false; uint8_t t = i_sTrgt.type; - uint8_t cnt = io_fd->hData->counts[t][GLBL]; + uint8_t cnt = io_fd->hData->counts[t][REG_GLBL]; uint32_t i = 0; @@ -246,7 +246,7 @@ bool FirData_addFirsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt, bool full = false; uint8_t t = i_sTrgt.type; - uint8_t cnt = io_fd->hData->counts[t][FIR]; + uint8_t cnt = io_fd->hData->counts[t][REG_FIR]; uint32_t i = 0; @@ -298,7 +298,7 @@ bool FirData_addRegsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt, bool full = false; uint8_t t = i_sTrgt.type; - uint8_t cnt = io_fd->hData->counts[t][REG]; + uint8_t cnt = io_fd->hData->counts[t][REG_REG]; uint32_t i = 0; @@ -330,7 +330,7 @@ bool FirData_addIdFirsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt, bool full = false; uint8_t t = i_sTrgt.type; - uint8_t cnt = io_fd->hData->counts[t][IDFIR]; + uint8_t cnt = io_fd->hData->counts[t][REG_IDFIR]; uint32_t i = 0; @@ -384,7 +384,7 @@ bool FirData_addIdRegsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt, bool full = false; uint8_t t = i_sTrgt.type; - uint8_t cnt = io_fd->hData->counts[t][IDREG]; + uint8_t cnt = io_fd->hData->counts[t][REG_IDREG]; uint32_t i = 0; @@ -436,9 +436,10 @@ bool FirData_addTrgtToPnor( FirData_t * io_fd, SCOM_Trgt_t i_sTrgt, /* Update the number of targets in the PNOR data. */ io_fd->pData->trgts++; - /* NOTE: Must add all regular registers (GLBL, FIR, REG) before all */ - /* indirect-SCOM registers. Also, must check GLBL registers first */ - /* to determine whether it is necessary to do the other registers. */ + /* NOTE: Must add all regular registers (REG_GLBL, REG_FIR, REG_REG) + * before all indirect-SCOM registers. Also, must check REG_GLBL + * registers first to determine whether it is necessary to do the + * other registers. */ /* Add the GLBLs. */ full = FirData_addGlblsToPnor( io_fd, pTrgt, i_sTrgt, o_noAttn ); @@ -499,7 +500,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) fsi = io_fd->hData->procFsiBaseAddr[p]; /* Add this PROC to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(PROC, p, 0, fsi, isM); + sTrgt = SCOM_Trgt_getTrgt(TRGT_PROC, p, 0, fsi, isM); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn ); if ( full ) break; if ( noAttn ) continue; /* Skip the PROC, EXs, and MCSs */ @@ -510,7 +511,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) if ( 0 == (io_fd->hData->exMasks[p] & (0x8000 >> u)) ) continue; /* Add this EX to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(EX, p, u, fsi, isM); + sTrgt = SCOM_Trgt_getTrgt(TRGT_EX, p, u, fsi, isM); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn ); if ( full ) break; if ( noAttn ) continue; /* Skip the EX */ @@ -523,7 +524,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) if ( 0 == (io_fd->hData->mcsMasks[p] & (0x80 >> u)) ) continue; /* Add this MCS to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(MCS, p, u, fsi, isM); + sTrgt = SCOM_Trgt_getTrgt(TRGT_MCS, p, u, fsi, isM); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn ); if ( full ) break; if ( noAttn ) continue; /* Skip the MCS */ @@ -533,38 +534,38 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) if ( full ) break; /* Iterate all MEMBs. Must do this separate of from the PROCs because */ - /* it is possible a MEMB could be reporting an attention but the */ + /* it is possible a MEMBUF could be reporting an attention but the */ /* connected PROC is not. */ - for ( i = 0; i < MAX_MEMB_PER_NODE; i++ ) + for ( i = 0; i < MAX_MEMBUF_PER_NODE; i++ ) { - p = i / MAX_MEMB_PER_PROC; - u = i % MAX_MEMB_PER_PROC; + p = i / MAX_MEMBUF_PER_PROC; + u = i % MAX_MEMBUF_PER_PROC; - /* Check if the MEMB is configured. */ + /* Check if the MEMBUF is configured. */ if ( 0 == (io_fd->hData->membMasks[p] & (0x80 >> u)) ) continue; /* Get the FSI base address. */ fsi = io_fd->hData->membFsiBaseAddr[p][u]; - /* Add this MEMB to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(MEMB, p, u, fsi, false); + /* Add this MEMBUF to the PNOR. */ + sTrgt = SCOM_Trgt_getTrgt(TRGT_MEMBUF, p, u, fsi, false); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn ); if ( full ) break; - if ( noAttn ) continue; /* Skip the MEMB and MBAs */ + if ( noAttn ) continue; /* Skip the MEMBUF and MBAs */ - for ( j = 0; j < MAX_MBA_PER_MEMB; j++ ) + for ( j = 0; j < MAX_MBA_PER_MEMBUF; j++ ) { - mu = u * MAX_MBA_PER_MEMB + j; + mu = u * MAX_MBA_PER_MEMBUF + j; /* Check if the MBA is configured. */ if ( 0 == (io_fd->hData->mbaMasks[p] & (0x8000 >> mu)) ) continue; /* Add this MBA to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(MBA, p, mu, fsi, false); + sTrgt = SCOM_Trgt_getTrgt(TRGT_MBA, p, mu, fsi, false); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn ); if ( full ) break; - if ( noAttn ) continue; /* Skip the MEMB */ + if ( noAttn ) continue; /* Skip the MEMBUF */ } if ( full ) break; } @@ -607,10 +608,10 @@ int32_t FirData_init( FirData_t * io_fd, bool full = false; - uint32_t x[MAX_TRGTS][MAX_REGS]; + uint32_t x[TRGT_MAX][REG_MAX]; size_t curIdx = 0; - uint32_t t = FIRST_TRGT; + uint32_t t = TRGT_FIRST; uint8_t * reglist = NULL; @@ -665,14 +666,14 @@ int32_t FirData_init( FirData_t * io_fd, /* Get the register list byte indexes in HOMER data buffer */ memset( x, 0x00, sizeof(x) ); - for ( t = FIRST_TRGT; t < MAX_TRGTS; t++ ) + for ( t = TRGT_FIRST; t < TRGT_MAX; t++ ) { - x[t][GLBL] = curIdx; - x[t][FIR] = x[t][GLBL] + sz_u32 * io_fd->hData->counts[t][GLBL]; - x[t][REG] = x[t][FIR] + sz_u32 * io_fd->hData->counts[t][FIR]; - x[t][IDFIR] = x[t][REG] + sz_u32 * io_fd->hData->counts[t][REG]; - x[t][IDREG] = x[t][IDFIR] + sz_u64 * io_fd->hData->counts[t][IDFIR]; - curIdx = x[t][IDREG] + sz_u64 * io_fd->hData->counts[t][IDREG]; + x[t][REG_GLBL] = curIdx; + x[t][REG_FIR] = x[t][REG_GLBL] + sz_u32 * io_fd->hData->counts[t][REG_GLBL]; + x[t][REG_REG] = x[t][REG_FIR] + sz_u32 * io_fd->hData->counts[t][REG_FIR]; + x[t][REG_IDFIR] = x[t][REG_REG] + sz_u32 * io_fd->hData->counts[t][REG_REG]; + x[t][REG_IDREG] = x[t][REG_IDFIR] + sz_u64 * io_fd->hData->counts[t][REG_IDFIR]; + curIdx = x[t][REG_IDREG] + sz_u64 * io_fd->hData->counts[t][REG_IDREG]; } /* Check to make sure the list data is not larger than the available */ @@ -687,13 +688,13 @@ int32_t FirData_init( FirData_t * io_fd, /* Now, get the pointers for each list. */ reglist = io_fd->hBuf + sz_hData; - for ( t = FIRST_TRGT; t < MAX_TRGTS; t++ ) + for ( t = TRGT_FIRST; t < TRGT_MAX; t++ ) { - (io_fd->hPtrs[t]).glbl = (uint32_t *)(reglist + x[t][GLBL] ); - (io_fd->hPtrs[t]).fir = (uint32_t *)(reglist + x[t][FIR] ); - (io_fd->hPtrs[t]).reg = (uint32_t *)(reglist + x[t][REG] ); - (io_fd->hPtrs[t]).idFir = (uint64_t *)(reglist + x[t][IDFIR]); - (io_fd->hPtrs[t]).idReg = (uint64_t *)(reglist + x[t][IDREG]); + (io_fd->hPtrs[t]).glbl = (uint32_t *)(reglist + x[t][REG_GLBL] ); + (io_fd->hPtrs[t]).fir = (uint32_t *)(reglist + x[t][REG_FIR] ); + (io_fd->hPtrs[t]).reg = (uint32_t *)(reglist + x[t][REG_REG] ); + (io_fd->hPtrs[t]).idFir = (uint64_t *)(reglist + x[t][REG_IDFIR]); + (io_fd->hPtrs[t]).idReg = (uint64_t *)(reglist + x[t][REG_IDREG]); } } while (0); @@ -737,12 +738,14 @@ int32_t FirData_captureCsFirData( uint8_t * i_hBuf, uint32_t i_hBufSize, FirData_addTrgtsToPnor( &fd ); /* Write the buffer to PNOR. */ +/* TODO: 175241 rc = PNOR_writeFirData( fd.hData->pnorInfo, fd.pBuf, fd.pBufSize ); if ( SUCCESS != rc ) { TRAC_ERR( FUNC"Failed to process FIR data" ); break; } +*/ } while (0); diff --git a/src/occ_405/firdata/firDataConst_common.h b/src/occ_405/firdata/firDataConst_common.h index 417e9b2..a30785e 100644 --- a/src/occ_405/firdata/firDataConst_common.h +++ b/src/occ_405/firdata/firDataConst_common.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/occ_const.H $ */ +/* $Source: src/occ_405/firdata/firDataConst_common.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -36,26 +36,69 @@ typedef enum { /* NOTE: These will be used as array indexes. */ - FIRST_TRGT = 0, - PROC = FIRST_TRGT, - EX, - MCS, - MEMB, - MBA, - MAX_TRGTS, + + TRGT_FIRST = 0, + + /** Common Nimbus/Cumulus types */ + TRGT_PROC = TRGT_FIRST, + TRGT_CAPP, + TRGT_XBUS, + TRGT_OBUS, + TRGT_PEC, + TRGT_PHB, + TRGT_EQ, + TRGT_EX, + TRGT_EC, + + /* Nimbus only */ + TRGT_MCBIST, + TRGT_MCS, + TRGT_MCA, + + /* Cumulus only */ + /* NOTE: Nimbus and Cumulus cannot be used at the same time. So we can have + * These array indexes overlap to save space. */ + TRGT_MC = TRGT_MCBIST, + TRGT_MI, + TRGT_DMI, + + /* Centaur only */ + TRGT_MEMBUF, + TRGT_MBA, + + TRGT_MAX, } TrgtType_t; /** Boundary/position ranges for each target type. */ typedef enum { - MAX_PROC_PER_NODE = 8, - MAX_EX_PER_PROC = 16, - MAX_MCS_PER_PROC = 8, - MAX_MEMB_PER_PROC = MAX_MCS_PER_PROC, - MAX_MEMB_PER_NODE = MAX_MEMB_PER_PROC * MAX_PROC_PER_NODE, - MAX_MBA_PER_MEMB = 2, - MAX_MBA_PER_PROC = MAX_MEMB_PER_PROC * MAX_MBA_PER_MEMB, + /* Common Nimbus/Cumulus */ + MAX_PROC_PER_NODE = 8, + MAX_CAPP_PER_PROC = 2, + MAX_XBUS_PER_PROC = 3, /* Nimbus 1 and 2, Cumulus 0, 1, and 2 */ + MAX_OBUS_PER_PROC = 4, /* Nimbus 0 and 3, Cumulus 0, 1, 2, and 3 */ + MAX_PEC_PER_PROC = 3, + MAX_PHB_PER_PROC = 6, + MAX_EQ_PER_PROC = 6, + MAX_EX_PER_PROC = 12, + MAX_EC_PER_PROC = 24, + + /** Nimbus only */ + MAX_MCBIST_PER_PROC = 2, + MAX_MCS_PER_PROC = 4, + MAX_MCA_PER_PROC = 8, + + /** Cumulus only */ + MAX_MC_PER_PROC = 2, + MAX_MI_PER_PROC = 4, + MAX_DMI_PER_PROC = 8, + + /** Centaur only */ + MAX_MEMBUF_PER_PROC = 8, + MAX_MEMBUF_PER_NODE = MAX_MEMBUF_PER_PROC * MAX_PROC_PER_NODE, + MAX_MBA_PER_MEMBUF = 2, + MAX_MBA_PER_PROC = MAX_MEMBUF_PER_PROC * MAX_MBA_PER_MEMBUF, } TrgtPos_t; @@ -63,13 +106,15 @@ typedef enum typedef enum { /* NOTE: These will be used as array indexes. */ - FIRST_REG = 0, - GLBL = FIRST_REG, - FIR, - REG, - IDFIR, - IDREG, - MAX_REGS, + REG_FIRST = 0, + + REG_GLBL = REG_FIRST, /* 32-bit addresses, 64-bit value */ + REG_FIR, /* 32-bit addresses, 64-bit value */ + REG_REG, /* 32-bit addresses, 64-bit value */ + REG_IDFIR, /* 64-bit addresses, 32-bit value */ + REG_IDREG, /* 64-bit addresses, 32-bit value */ + + REG_MAX, } RegType_t; @@ -82,3 +127,4 @@ typedef enum } IplState_t; #endif /* __firDataConst_common_h */ + diff --git a/src/occ_405/firdata/homerData_common.h b/src/occ_405/firdata/homerData_common.h index 21989b2..1336258 100644 --- a/src/occ_405/firdata/homerData_common.h +++ b/src/occ_405/firdata/homerData_common.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/homerData.H $ */ +/* $Source: src/occ_405/firdata/homerData_common.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -129,13 +129,13 @@ typedef struct __attribute__((packed)) uint16_t mbaMasks[MAX_PROC_PER_NODE]; /** Contains number of registers per type for each target type. */ - uint8_t counts[MAX_TRGTS][MAX_REGS]; + uint8_t counts[TRGT_MAX][REG_MAX]; /** FSI base address for each PROC chip. */ uint32_t procFsiBaseAddr[MAX_PROC_PER_NODE]; /** FSI base address for each MEMB chip. */ - uint32_t membFsiBaseAddr[MAX_PROC_PER_NODE][MAX_MEMB_PER_PROC]; + uint32_t membFsiBaseAddr[MAX_PROC_PER_NODE][MAX_MEMBUF_PER_PROC]; /** Information regarding the PNOR location and size. */ HOMER_PnorInfo_t pnorInfo; diff --git a/src/occ_405/firdata/native.c b/src/occ_405/firdata/native.c index 10ec524..3d57801 100644 --- a/src/occ_405/firdata/native.c +++ b/src/occ_405/firdata/native.c @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/native.C $ */ +/* $Source: src/occ_405/firdata/native.c $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,11 +40,14 @@ int32_t xscom_read( uint32_t i_address, uint64_t * o_data ) *o_data = 0; +// TODO: RTC 173636 Needs SCOM support. +#if 0 rc = getscom_ffdc( i_address, o_data, NULL ); if ( SUCCESS != rc ) { TRAC_ERR( "SCOM error in xscom_read wrapper, rc=%d", rc ); } +#endif if ( TRACE_XSCOM ) { @@ -59,11 +62,14 @@ int32_t xscom_write( uint32_t i_address, uint64_t i_data ) { int32_t rc = SUCCESS; +// TODO: RTC 173636 Needs SCOM support. +#if 0 rc = putscom_ffdc( i_address, i_data, NULL ); if ( SUCCESS != rc ) { TRAC_ERR( "SCOM error in xscom_write wrapper, rc=%d", rc ); } +#endif if ( TRACE_XSCOM ) { diff --git a/src/occ_405/firdata/native.h b/src/occ_405/firdata/native.h index 242c5e3..160668e 100644 --- a/src/occ_405/firdata/native.h +++ b/src/occ_405/firdata/native.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/native.H $ */ +/* $Source: src/occ_405/firdata/native.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -46,7 +46,7 @@ extern "C" { #define TRACDCOMP(frmt,args...) #endif // FIRD_DEBUG -#define TRACFCOMP(frmt,args...) TRACE(g_trac_inf,INFO_MRK frmt,##args) +#define TRACFCOMP(frmt,args...) TRACE(&g_des_array[INF_TRACE_DESCRIPTOR],INFO_MRK frmt,##args) #else // NO_TRAC_STRINGS diff --git a/src/occ_405/firdata/pnorData_common.h b/src/occ_405/firdata/pnorData_common.h index 2b9f4d1..a020ae9 100644 --- a/src/occ_405/firdata/pnorData_common.h +++ b/src/occ_405/firdata/pnorData_common.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/pnorData.H $ */ +/* $Source: src/occ_405/firdata/pnorData_common.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -106,13 +106,16 @@ typedef enum /** Information for each target with SCOM data. */ typedef struct __attribute__((packed)) { - uint32_t type : 3; /** Target type. See enum TrgtType_t */ + uint32_t reserved1: 3; uint32_t procPos : 3; /** The processor position (0-7) */ uint32_t unitPos : 4; /** Unit position relative to the processor (0-15) */ uint32_t regs : 9; /** Number of normal registers */ uint32_t idRegs : 4; /** Number of indirect-SCOM registers */ uint32_t scomErrs : 9; /** Number of SCOM errors detected */ + uint8_t trgtType : 6; /** Target type. See enum TrgtType_t */ + uint8_t reserved : 2; + } PNOR_Trgt_t; /** @param i_type Target type. See enum TrgtType_t. @@ -124,7 +127,7 @@ static inline PNOR_Trgt_t PNOR_getTrgt( uint32_t i_type, uint32_t i_procPos, uint32_t i_procUnitPos ) { PNOR_Trgt_t t; - t.type = i_type; + t.trgtType = i_type; t.procPos = i_procPos; t.unitPos = i_procUnitPos; t.regs = 0; diff --git a/src/occ_405/firdata/pnor_util.c b/src/occ_405/firdata/pnor_util.c index f27dbb7..17a6350 100644 --- a/src/occ_405/firdata/pnor_util.c +++ b/src/occ_405/firdata/pnor_util.c @@ -26,7 +26,7 @@ /* Interfaces to write into PNOR */ #include -#include +#include #include #include #include diff --git a/src/occ_405/firdata/scom_trgt.c b/src/occ_405/firdata/scom_trgt.c index ec38122..468914c 100644 --- a/src/occ_405/firdata/scom_trgt.c +++ b/src/occ_405/firdata/scom_trgt.c @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/scoms.C $ */ +/* $Source: src/occ_405/firdata/scom_trgt.c $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -41,9 +41,9 @@ SCOM_Trgt_t SCOM_Trgt_getTrgt( TrgtType_t i_type, uint8_t i_procPos, .fsiBaseAddr = i_fsiBaseAddr, }; - if ( PROC == trgt.type ) trgt.procUnitPos = 0; + if ( TRGT_PROC == trgt.type ) trgt.procUnitPos = 0; - if ( MEMB == trgt.type || MBA == trgt.type ) trgt.isMaster = false; + if ( TRGT_MEMBUF == trgt.type || TRGT_MBA == trgt.type ) trgt.isMaster = false; return trgt; } @@ -56,19 +56,19 @@ uint8_t SCOM_Trgt_getChipPos( SCOM_Trgt_t i_trgt ) switch ( i_trgt.type ) { - case PROC: - case EX: - case MCS: + case TRGT_PROC: + case TRGT_EX: + case TRGT_MCS: p = i_trgt.procPos; break; - case MEMB: - p = (i_trgt.procPos * MAX_MEMB_PER_PROC) + i_trgt.procUnitPos; + case TRGT_MEMBUF: + p = (i_trgt.procPos * MAX_MEMBUF_PER_PROC) + i_trgt.procUnitPos; break; - case MBA: - p = (i_trgt.procPos * MAX_MEMB_PER_PROC) + - (i_trgt.procUnitPos / MAX_MBA_PER_MEMB); + case TRGT_MBA: + p = (i_trgt.procPos * MAX_MEMBUF_PER_PROC) + + (i_trgt.procUnitPos / MAX_MBA_PER_MEMBUF); break; default: ; @@ -85,13 +85,13 @@ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt ) switch ( i_trgt.type ) { - case PROC: - case MEMB: u = 0; break; + case TRGT_PROC: + case TRGT_MEMBUF: u = 0; break; - case EX: - case MCS: u = i_trgt.procUnitPos; break; + case TRGT_EX: + case TRGT_MCS: u = i_trgt.procUnitPos; break; - case MBA: u = i_trgt.procUnitPos % MAX_MBA_PER_MEMB; break; + case TRGT_MBA: u = i_trgt.procUnitPos % MAX_MBA_PER_MEMBUF; break; default: ; } @@ -103,15 +103,15 @@ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt ) SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt ) { - TrgtType_t t = MAX_TRGTS; + TrgtType_t t = TRGT_MAX; switch ( i_trgt.type ) { - case PROC: - case EX: - case MCS: t = PROC; break; + case TRGT_PROC: + case TRGT_EX: + case TRGT_MCS: t = TRGT_PROC; break; - case MEMB: - case MBA: t = MEMB; break; + case TRGT_MEMBUF: + case TRGT_MBA: t = TRGT_MEMBUF; break; default: ; } @@ -119,12 +119,12 @@ SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt ) uint8_t u = 0; switch ( i_trgt.type ) { - case PROC: - case EX: - case MCS: - case MEMB: u = i_trgt.procUnitPos; break; + case TRGT_PROC: + case TRGT_EX: + case TRGT_MCS: + case TRGT_MEMBUF: u = i_trgt.procUnitPos; break; - case MBA: u = i_trgt.procUnitPos / MAX_MBA_PER_MEMB; break; + case TRGT_MBA: u = i_trgt.procUnitPos / MAX_MBA_PER_MEMBUF; break; default: ; } diff --git a/src/occ_405/firdata/scom_util.c b/src/occ_405/firdata/scom_util.c index 4f6a391..4300693 100644 --- a/src/occ_405/firdata/scom_util.c +++ b/src/occ_405/firdata/scom_util.c @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/firdata/scom_util.C $ */ +/* $Source: src/occ_405/firdata/scom_util.c $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -91,7 +91,7 @@ int32_t translate_addr( SCOM_Trgt_t i_trgt, uint64_t i_addr, uint64_t * o_addr ) *o_addr = i_addr; /* No translation needed for non-unit scoms */ - if( (l_type == PROC) || (l_type == MEMB) ) + if( (l_type == TRGT_PROC) || (l_type == TRGT_MEMBUF) ) { *o_addr = i_addr; } @@ -99,12 +99,12 @@ int32_t translate_addr( SCOM_Trgt_t i_trgt, uint64_t i_addr, uint64_t * o_addr ) { uint8_t l_num = SCOM_Trgt_getChipUnitPos(i_trgt); - if( l_type == EX ) + if( l_type == TRGT_EX ) { /*first byte is 0x10, second nibble of that byte is the EX number */ *o_addr |= (l_num << 24); } - else if( l_type == MCS ) + else if( l_type == TRGT_MCS ) { /*Non-DMI address */ if( (i_addr & MCS_MASK) == MCS_BASEADDR ) @@ -197,7 +197,7 @@ int32_t translate_addr( SCOM_Trgt_t i_trgt, uint64_t i_addr, uint64_t * o_addr ) } } } - else if( l_type == MBA ) + else if( l_type == TRGT_MBA ) { if( (i_addr & MBA_MASK) == MBA_BASEADDR ) { diff --git a/src/occ_405/occLinkInputFile b/src/occ_405/occLinkInputFile index 2fd2588..dd4e75e 100644 --- a/src/occ_405/occLinkInputFile +++ b/src/occ_405/occLinkInputFile @@ -42,7 +42,6 @@ INPUT ( amec_amester.o dpss.o errl.o ffdc.o - fir_data_collect.o homer.o ll_ffdc.o lock.o @@ -98,4 +97,12 @@ INPUT ( amec_amester.o threadSch.o timer.o trac_interface.o - wof.o) + wof.o + ecc.o + firData.o + fir_data_collect.o + fsi.o + native.o + scom_trgt.o + scom_util.o +) diff --git a/src/occ_405/topfiles.mk b/src/occ_405/topfiles.mk index 9eb45cd..445f7c3 100644 --- a/src/occ_405/topfiles.mk +++ b/src/occ_405/topfiles.mk @@ -64,9 +64,15 @@ TOP-C-SOURCES = amec/amec_analytics.c \ dimm/dimm.c \ dimm/dimm_control.c \ errl/errl.c \ - firdata/fir_data_collect.c \ firdata/ast_mboxdd.c \ + firdata/ecc.c \ + firdata/firData.c \ + firdata/fir_data_collect.c \ + firdata/fsi.c \ + firdata/native.c \ firdata/pnor_mboxdd.c \ + firdata/scom_trgt.c \ + firdata/scom_util.c \ homer.c \ lock/lock.c \ main.c \ -- cgit v1.2.1