From d60be21fc39657514717869098f8da519a3e0b40 Mon Sep 17 00:00:00 2001 From: Zane Shelley Date: Thu, 6 Dec 2018 11:13:52 -0600 Subject: FIRDATA: remove Cumulus/Centaur targets and add Axone/Explorer Change-Id: I1776bafec4aa5dcedcc2202413f3f997788c9b57 RTC: 201994 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69529 Tested-by: FSP CI Jenkins Reviewed-by: Caleb N. Palmer Reviewed-by: Brian J. Stegmiller Reviewed-by: Martha Broyles --- src/occ_gpe0/firdata/firData.c | 29 ++-------- src/occ_gpe0/firdata/firDataConst_common.h | 45 +++++++-------- src/occ_gpe0/firdata/scom_trgt.c | 64 ++++++++++++--------- src/occ_gpe0/firdata/scom_util.c | 92 +----------------------------- 4 files changed, 65 insertions(+), 165 deletions(-) (limited to 'src/occ_gpe0') diff --git a/src/occ_gpe0/firdata/firData.c b/src/occ_gpe0/firdata/firData.c index 1e2a789..ecdba8e 100644 --- a/src/occ_gpe0/firdata/firData.c +++ b/src/occ_gpe0/firdata/firData.c @@ -930,8 +930,6 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) << (32 - MAX_MC_PER_PROC); l_existBits.mcs_mi_Mask = ((uint32_t)(l_cumExistBitPtr->miMask)) << (32 - MAX_MI_PER_PROC); - l_existBits.mca_dmi_Mask = ((uint32_t)(l_cumExistBitPtr->dmiMask)) - << (32 - MAX_DMI_PER_PROC); l_existBits.cappMask = ((uint32_t)(l_cumExistBitPtr->cappMask)) << (32 - MAX_CAPP_PER_PROC); l_existBits.pecMask = ((uint32_t)(l_cumExistBitPtr->pecMask)) @@ -1102,26 +1100,16 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) /* processor type can impact next few units */ - TrgtType_t l_pnorTarget = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ? - TRGT_MCBIST : TRGT_MC; - uint32_t l_maxPerProc = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ? - MAX_MCBIST_PER_PROC : MAX_MC_PER_PROC; - - TrgtType_t l_pnorTarg2 = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ? - TRGT_MCA : TRGT_DMI; - uint32_t l_maxPerProc2 = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ? - MAX_MCA_PER_PROC : MAX_DMI_PER_PROC; - - uint32_t l_UnitPerMc = l_maxPerProc2 / l_maxPerProc; + uint32_t l_UnitPerMc = MAX_MCA_PER_PROC / MAX_MCBIST_PER_PROC; uint8_t l_unitNumber; - for ( u = 0; u < l_maxPerProc; u++ ) + for ( u = 0; u < MAX_MCBIST_PER_PROC; u++ ) { /* Check if MCBIST / MC is configured. */ if ( 0 == (l_existBits.mcbist_mc_Mask & (0x80000000 >> u)) ) continue; /* Add this MCBIST or MC to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(l_pnorTarget, p, u, fsi, isM); + sTrgt = SCOM_Trgt_getTrgt(TRGT_MCBIST, p, u, fsi, isM); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn, l_chipPtr ); if ( full ) break; if ( noAttn ) continue; /* Skip the rest */ @@ -1136,7 +1124,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) if ( 0 == (l_existBits.mca_dmi_Mask & (0x80000000 >> l_unitNumber)) ) continue; /* Add this MCA / DMI to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(l_pnorTarg2, p, l_unitNumber, fsi, isM); + sTrgt = SCOM_Trgt_getTrgt(TRGT_MCA, p, l_unitNumber, fsi, isM); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn, l_chipPtr ); if ( full ) break; @@ -1147,18 +1135,13 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) if ( full ) break; - l_pnorTarget = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ? - TRGT_MCS : TRGT_MI; - l_maxPerProc = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ? - MAX_MCS_PER_PROC : MAX_MI_PER_PROC; - - for ( u = 0; u < l_maxPerProc; u++ ) + for ( u = 0; u < MAX_MCS_PER_PROC; u++ ) { /* Check if the MCS / MI is configured. */ if ( 0 == (l_existBits.mcs_mi_Mask & (0x80000000 >> u)) ) continue; /* Add this MCS or MI to the PNOR. */ - sTrgt = SCOM_Trgt_getTrgt(l_pnorTarget, p, u, fsi, isM); + sTrgt = SCOM_Trgt_getTrgt(TRGT_MCS, p, u, fsi, isM); full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn, l_chipPtr ); if ( full ) break; } diff --git a/src/occ_gpe0/firdata/firDataConst_common.h b/src/occ_gpe0/firdata/firDataConst_common.h index 403a028..3d1ec18 100644 --- a/src/occ_gpe0/firdata/firDataConst_common.h +++ b/src/occ_gpe0/firdata/firDataConst_common.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ_405/firdata/firDataConst_common.h $ */ +/* $Source: src/occ_gpe0/firdata/firDataConst_common.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -33,16 +33,12 @@ #include /** Target types for all supported targets. */ -/** NOTE: These are used to build the register list in HOMER data */ -/** and also to create the exiting chiplet masks. Hence, */ -/** the numbers assigned here have to match the sequence */ -/** of chiplets in HOMER_ChipNimbus_t, HOMER_ChipCumulus_t, etc. */ typedef enum { /* NOTE: These will be used as array indexes. */ TRGT_FIRST = 0, - /** Common Nimbus/Cumulus types */ + /** Common Nimbus/Axone types */ TRGT_PROC = TRGT_FIRST, TRGT_CAPP, TRGT_XBUS, @@ -58,16 +54,15 @@ typedef enum TRGT_MCS, TRGT_MCA, - /* Cumulus only */ - /* NOTE: Nimbus and Cumulus cannot be used at the same time. So we can have - * These array indexes overlap to save space. */ - TRGT_MC = TRGT_MCBIST, + /* Axone only */ + TRGT_MC, TRGT_MI, - TRGT_DMI, + TRGT_MCC, + TRGT_OMIC, + TRGT_NPU, - /* Centaur only */ - TRGT_MEMBUF, - TRGT_MBA, + /* Explorer only */ + TRGT_OCMB, TRGT_MAX, @@ -76,11 +71,11 @@ typedef enum /** Boundary/position ranges for each target type. */ typedef enum { - /* Common Nimbus/Cumulus */ + /* Common Nimbus/Axone */ MAX_PROC_PER_NODE = 8, MAX_CAPP_PER_PROC = 2, - MAX_XBUS_PER_PROC = 3, /* Nimbus 1 and 2, Cumulus 0, 1, and 2 */ - MAX_OBUS_PER_PROC = 4, /* Nimbus 0 and 3, Cumulus 0, 1, 2, and 3 */ + MAX_XBUS_PER_PROC = 3, /* Nimbus 1 and 2, Axone 0, 1, and 2 */ + MAX_OBUS_PER_PROC = 4, /* Nimbus 0 and 3, Axone 0, 1, 2, and 3 */ MAX_PEC_PER_PROC = 3, MAX_PHB_PER_PROC = 6, MAX_EQ_PER_PROC = 6, @@ -92,16 +87,16 @@ typedef enum MAX_MCS_PER_PROC = 4, MAX_MCA_PER_PROC = 8, - /** Cumulus only */ + /** Axone only */ MAX_MC_PER_PROC = 2, MAX_MI_PER_PROC = 4, - MAX_DMI_PER_PROC = 8, + MAX_MCC_PER_PROC = 8, + MAX_OMIC_PER_PROC = 6, + MAX_NPU_PER_PROC = 3, - /** Centaur only */ - MAX_MEMBUF_PER_PROC = 8, - MAX_MEMBUF_PER_NODE = MAX_MEMBUF_PER_PROC * MAX_PROC_PER_NODE, - MAX_MBA_PER_MEMBUF = 2, - MAX_MBA_PER_PROC = MAX_MEMBUF_PER_PROC * MAX_MBA_PER_MEMBUF, + /** Explorer only */ + MAX_OCMB_PER_PROC = 16 , + MAX_OCMB_PER_NODE = MAX_OCMB_PER_PROC * MAX_PROC_PER_NODE, } TrgtPos_t; diff --git a/src/occ_gpe0/firdata/scom_trgt.c b/src/occ_gpe0/firdata/scom_trgt.c index 15ad3fc..9eae5a7 100644 --- a/src/occ_gpe0/firdata/scom_trgt.c +++ b/src/occ_gpe0/firdata/scom_trgt.c @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ_405/firdata/scom_trgt.c $ */ +/* $Source: src/occ_gpe0/firdata/scom_trgt.c $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,7 +27,7 @@ #include #include -/*------------------------------------------------------------------------------ */ +/*----------------------------------------------------------------------------*/ SCOM_Trgt_t SCOM_Trgt_getTrgt( TrgtType_t i_type, uint8_t i_procPos, uint8_t i_procUnitPos, uint32_t i_fsiBaseAddr, @@ -44,9 +44,10 @@ SCOM_Trgt_t SCOM_Trgt_getTrgt( TrgtType_t i_type, uint8_t i_procPos, if (TRGT_PROC == trgt.type) { trgt.procUnitPos = 0; - } + } - if ( TRGT_MEMBUF == trgt.type || TRGT_MBA == trgt.type ) + /* Only processor targets can be on the master processor. */ + if ( TRGT_OCMB == trgt.type ) { trgt.isMaster = false; } @@ -54,7 +55,7 @@ SCOM_Trgt_t SCOM_Trgt_getTrgt( TrgtType_t i_type, uint8_t i_procPos, return trgt; } -/*------------------------------------------------------------------------------ */ +/*----------------------------------------------------------------------------*/ uint8_t SCOM_Trgt_getChipPos( SCOM_Trgt_t i_trgt ) { @@ -74,16 +75,16 @@ uint8_t SCOM_Trgt_getChipPos( SCOM_Trgt_t i_trgt ) case TRGT_MCBIST: case TRGT_MCS: case TRGT_MCA: + case TRGT_MC: + case TRGT_MI: + case TRGT_MCC: + case TRGT_OMIC: + case TRGT_NPU: p = i_trgt.procPos; break; - case TRGT_MEMBUF: /* TODO RTC 173614 -- with CUMULUS */ - p = (i_trgt.procPos * MAX_MEMBUF_PER_PROC) + i_trgt.procUnitPos; - break; - - case TRGT_MBA: /* TODO RTC 173614 -- with CUMULUS */ - p = (i_trgt.procPos * MAX_MEMBUF_PER_PROC) + - (i_trgt.procUnitPos / MAX_MBA_PER_MEMBUF); + case TRGT_OCMB: + p = (i_trgt.procPos * MAX_OCMB_PER_PROC) + i_trgt.procUnitPos; break; default: ; @@ -92,7 +93,7 @@ uint8_t SCOM_Trgt_getChipPos( SCOM_Trgt_t i_trgt ) return p; } -/*------------------------------------------------------------------------------ */ +/*----------------------------------------------------------------------------*/ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt ) { @@ -101,7 +102,7 @@ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt ) switch ( i_trgt.type ) { case TRGT_PROC: - case TRGT_MEMBUF: u = 0; break; + case TRGT_OCMB: u = 0; break; case TRGT_CAPP: case TRGT_XBUS: @@ -113,10 +114,12 @@ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt ) case TRGT_EC: case TRGT_MCBIST: case TRGT_MCS: - case TRGT_MCA: u = i_trgt.procUnitPos; break; - - case TRGT_MBA: u = i_trgt.procUnitPos % MAX_MBA_PER_MEMBUF; break; - /* TODO RTC 173614 -- with CUMULUS */ + case TRGT_MCA: + case TRGT_MC: + case TRGT_MI: + case TRGT_MCC: + case TRGT_OMIC: + case TRGT_NPU: u = i_trgt.procUnitPos; break; default: ; } @@ -124,7 +127,7 @@ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt ) return u; } -/*------------------------------------------------------------------------------ */ +/*----------------------------------------------------------------------------*/ SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt ) { @@ -142,10 +145,14 @@ SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt ) case TRGT_EC: case TRGT_MCBIST: case TRGT_MCS: - case TRGT_MCA: t = TRGT_PROC; break; + case TRGT_MCA: + case TRGT_MC: + case TRGT_MI: + case TRGT_MCC: + case TRGT_OMIC: + case TRGT_NPU: t = TRGT_PROC; break; - case TRGT_MEMBUF: - case TRGT_MBA: t = TRGT_MEMBUF; break; + case TRGT_OCMB: t = TRGT_OCMB; break; default: ; } @@ -165,11 +172,12 @@ SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt ) case TRGT_MCBIST: case TRGT_MCS: case TRGT_MCA: - case TRGT_MEMBUF: u = i_trgt.procUnitPos; break; - /* TODO RTC 173614 -- with CUMULUS */ - - case TRGT_MBA: u = i_trgt.procUnitPos / MAX_MBA_PER_MEMBUF; break; - /* TODO RTC 173614 -- with CUMULUS */ + case TRGT_MC: + case TRGT_MI: + case TRGT_MCC: + case TRGT_OMIC: + case TRGT_NPU: + case TRGT_OCMB: u = i_trgt.procUnitPos; break; default: ; } diff --git a/src/occ_gpe0/firdata/scom_util.c b/src/occ_gpe0/firdata/scom_util.c index ed806cb..2b328b0 100644 --- a/src/occ_gpe0/firdata/scom_util.c +++ b/src/occ_gpe0/firdata/scom_util.c @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ_405/firdata/scom_util.c $ */ +/* $Source: src/occ_gpe0/firdata/scom_util.c $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -97,7 +97,7 @@ int32_t translate_addr( SCOM_Trgt_t i_trgt, uint64_t i_addr, uint64_t * o_addr ) //The following translation logic is a copy of p9_scominfo_createChipUnitScomAddr //function from EKB (chips/p9/common/scominfo/p9_scominfo.C) - if(i_trgt.type == TRGT_PROC || i_trgt.type == TRGT_MEMBUF) + if(i_trgt.type == TRGT_PROC || i_trgt.type == TRGT_OCMB) { //No need to translate here. //We already assigned i_addr to o_addr above, so just return SUCCESS. @@ -199,39 +199,6 @@ int32_t translate_addr( SCOM_Trgt_t i_trgt, uint64_t i_addr, uint64_t * o_addr ) { set_chiplet_id(EC00_CHIPLET_ID + l_chip_unit_num, o_addr); } - else if(i_trgt.type == TRGT_MBA) //MBA - { - if( (i_addr & MBA_MASK) == MBA_BASEADDR ) - { - /* 0x00000000_03010400 MBA 0 # MBA01 */ - /* 0x00000000_03010C00 MBA 1 # MBA23 */ - if( l_chip_unit_num == 1 ) - { - *o_addr |= 0x00000800; - } - } - else if( (i_addr & MBA_MASK) == TCM_MBA_BASEADDR ) - { - /* 0x00000000_03010880 MBA 0 # Trace for MBA01 */ - /* 0x00000000_030110C0 MBA 1 # Trace for MBA23 */ - *o_addr |= (l_chip_unit_num * 0x840); - } - else if( (i_addr & MBA_MASK) == IND_MBA_BASEADDR ) - { - /* 0x00000000_03011400 MBA 0 # DPHY01 (indirect addressing) */ - /* 0x00000000_03011800 MBA 1 # DPHY23 (indirect addressing) */ - /* 0x80000000_0301143f MBA 0 # DPHY01 (indirect addressing) */ - /* 0x80000000_0301183f MBA 1 # DPHY23 (indirect addressing) */ - /* 0x80000000_0701143f MBA 0 # DPHY01 (indirect addressing) */ - /* 0x80000000_0701183f MBA 1 # DPHY23 (indirect addressing) */ - if( l_chip_unit_num == 1 ) - { - /* 030114zz->030118zz */ - *o_addr &= 0xFFFFFFFFFFFFFBFF; - *o_addr |= 0x0000000000000800; - } - } - } else if(i_trgt.type == TRGT_MCS || //MCS i_trgt.type == TRGT_MI) //MI TODO RTC 175488 { @@ -275,59 +242,6 @@ int32_t translate_addr( SCOM_Trgt_t i_trgt, uint64_t i_addr, uint64_t * o_addr ) set_sat_offset(l_mcs_sat_offset, o_addr); } } - else if(i_trgt.type == TRGT_DMI) //DMI TODO RTC 175488 - { - if(get_chiplet_id(i_addr) == N3_CHIPLET_ID || get_chiplet_id(i_addr) == N1_CHIPLET_ID) - { - set_chiplet_id(N3_CHIPLET_ID - 2 * (l_chip_unit_num / 4), o_addr); - set_sat_id(2 * ((l_chip_unit_num / 2) % 2), o_addr); - uint8_t l_sat_offset = get_sat_offset(i_addr); - l_sat_offset = (l_sat_offset & 0xF) + ((2 + (l_chip_unit_num % 2)) << 4); - set_sat_offset(l_sat_offset, o_addr); - } - else if(get_chiplet_id(i_addr) == MC01_CHIPLET_ID || get_chiplet_id(i_addr) == MC23_CHIPLET_ID) - { - if(get_ring(i_addr) == P9C_MC_CHAN_RING_ID) - { - set_chiplet_id(MC01_CHIPLET_ID + l_chip_unit_num / 4, o_addr); - uint8_t l_sat_id = get_sat_id(i_addr); - l_sat_id = l_sat_id & 0xC; - set_sat_id(l_sat_id + l_chip_unit_num % 4, o_addr); - } - else if(get_ring(i_addr) == P9C_MC_BIST_RING_ID) - { - set_chiplet_id(MC01_CHIPLET_ID + l_chip_unit_num / 4, o_addr); - uint8_t l_sat_offset = get_sat_offset(i_addr); - l_sat_offset = (l_sat_offset & 0xF) + ((l_chip_unit_num % 2) << 4); - set_sat_offset(l_sat_offset, o_addr); - } - else if(get_ring(i_addr) == P9C_MC_IO_RING_ID) - { - set_chiplet_id(MC01_CHIPLET_ID + l_chip_unit_num / 4, o_addr); - uint8_t l_rxtx_group = get_rxtx_group_id(i_addr); - l_rxtx_group = l_rxtx_group & 0xF0; - - switch(l_chip_unit_num % 4) - { - case 0: - l_rxtx_group += 3; - break; - case 1: - l_rxtx_group += 2; - break; - case 2: - l_rxtx_group += 0; - break; - case 3: - l_rxtx_group += 1; - break; - default: - break; - } - set_rxtx_group_id(l_rxtx_group, o_addr); - } - } - } else { TRAC_ERR( FUNC"unsupported unit type %d", i_trgt.type ); -- cgit v1.2.1