From 58e422dede5932f5b8e01a88315001b0525cc478 Mon Sep 17 00:00:00 2001 From: Zane Shelley Date: Fri, 7 Dec 2018 10:19:14 -0600 Subject: FIRDATA: added Axone/Explorer support to firData.c Change-Id: I2847ae7c0c7c20770f45a4aae584e6ec225b1ce5 RTC: 201994 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69559 Tested-by: FSP CI Jenkins Reviewed-by: Caleb N. Palmer Reviewed-by: Brian J. Stegmiller Reviewed-by: Martha Broyles --- src/occ_gpe0/firdata/firData.c | 71 ++++++++++++++++++++++++++++++--- src/occ_gpe0/firdata/homerData_common.h | 40 ++++++++++++++++++- 2 files changed, 105 insertions(+), 6 deletions(-) (limited to 'src/occ_gpe0/firdata') diff --git a/src/occ_gpe0/firdata/firData.c b/src/occ_gpe0/firdata/firData.c index ea1fa26..5e35056 100644 --- a/src/occ_gpe0/firdata/firData.c +++ b/src/occ_gpe0/firdata/firData.c @@ -886,10 +886,10 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) ADD_TO_PNOR( PROC, 0 ) ADD_UNITS_TO_PNOR( xbusMask, XBUS ) - ADD_UNITS_TO_PNOR( obusMask, OBUS ) - ADD_UNITS_TO_PNOR( cappMask, CAPP ) + ADD_UNITS_TO_PNOR( ecMask, EC ) + ADD_UNITS_TO_PNOR( mcsMask, MCS ) START_UNIT_LOOP( u1, PROC_MAX(PEC) ) @@ -912,8 +912,6 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) END_UNIT_LOOP - ADD_UNITS_TO_PNOR( ecMask, EC ) - START_UNIT_LOOP( u1, PROC_MAX(EQ) ) ADD_UNIT_TO_PNOR( eqMask, EQ, u1 ) ADD_SUBUNITS_TO_PNOR( exMask, EQ, EX ) @@ -923,8 +921,63 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) ADD_UNIT_TO_PNOR( mcbistMask, MCBIST, u1 ) ADD_SUBUNITS_TO_PNOR( mcaMask, MCBIST, MCA ) END_UNIT_LOOP + } + else if ( HOMER_CHIP_AXONE == chipHdr->chipType ) + { + // Keep a pointer of the current chip data. + HOMER_ChipAxone_t * chipData = (HOMER_ChipAxone_t *) byteIdx; + byteIdx += sizeof(HOMER_ChipAxone_t); - ADD_UNITS_TO_PNOR( mcsMask, MCS ) + isM = chipData->isMaster; + + ADD_TO_PNOR( PROC, 0 ) + + ADD_UNITS_TO_PNOR( xbusMask, XBUS ) + ADD_UNITS_TO_PNOR( obusMask, OBUS ) + ADD_UNITS_TO_PNOR( cappMask, CAPP ) + ADD_UNITS_TO_PNOR( ecMask, EC ) + ADD_UNITS_TO_PNOR( npuMask, NPU ) + ADD_UNITS_TO_PNOR( miMask, MI ) + + START_UNIT_LOOP( u1, PROC_MAX(PEC) ) + + ADD_UNIT_TO_PNOR( pecMask, PEC, u1 ) + + // The PEC unit number matches the number of PHBs under + // that PEC. + START_UNIT_LOOP( u2, u1 + 1 ) + + // Calculate the PHB unit position. + // PEC0-> PHB0 + // PEC1-> PHB1 PHB2 + // PEC2-> PHB3 PHB4 PHB5 + u3 = u1 + u2; + if ( (PROC_MAX(PEC) - 1) == u1 ) u3++; + + ADD_UNIT_TO_PNOR( phbMask, PHB, u3 ) + + END_UNIT_LOOP + + END_UNIT_LOOP + + START_UNIT_LOOP( u1, PROC_MAX(EQ) ) + ADD_UNIT_TO_PNOR( eqMask, EQ, u1 ) + ADD_SUBUNITS_TO_PNOR( exMask, EQ, EX ) + END_UNIT_LOOP + + START_UNIT_LOOP( u1, PROC_MAX(MC) ) + ADD_UNIT_TO_PNOR( mcMask, MC, u1 ) + ADD_SUBUNITS_TO_PNOR( mccMask, MC, MCC ) + ADD_SUBUNITS_TO_PNOR( omicMask, MC, OMIC ) + END_UNIT_LOOP + } + else if ( HOMER_CHIP_EXPLORER == chipHdr->chipType ) + { + // NOTE: The Explorer chip does not have any unit data. + + isM = false; // processor chips only. + + ADD_TO_PNOR( OCMB, 0 ); } else { @@ -1079,6 +1132,14 @@ int32_t FirData_init( FirData_t * io_fd, { reglist += sizeof(HOMER_ChipNimbus_t); } + else if (HOMER_CHIP_AXONE == l_chiptPtr->chipType) + { + reglist += sizeof(HOMER_ChipAxone_t); + } + else if (HOMER_CHIP_EXPLORER == l_chiptPtr->chipType) + { + // There is no chip unit data for Explorer. + } else { TRAC_ERR(FUNC"Chiptype is invalid %X ", (uint32_t)l_chiptPtr->chipType); diff --git a/src/occ_gpe0/firdata/homerData_common.h b/src/occ_gpe0/firdata/homerData_common.h index f0e3db8..e661467 100644 --- a/src/occ_gpe0/firdata/homerData_common.h +++ b/src/occ_gpe0/firdata/homerData_common.h @@ -140,7 +140,11 @@ static inline HOMER_Data_t HOMER_getData() /** Supported chip types. */ typedef enum { - HOMER_CHIP_NIMBUS, /** P9 Nimbus processor chip */ + HOMER_CHIP_NIMBUS, /** P9 Nimbus processor chip */ + HOMER_CHIP_AXONE, /** P9 Axone processor chip */ + HOMER_CHIP_EXPLORER, /** Explorer memory buffer chip */ + + HOMER_CHIP_INVALID = 0xff, /** Invalid chip */ } HOMER_ChipType_t; @@ -215,4 +219,38 @@ static inline HOMER_ChipNimbus_t HOMER_initChipNimbus() return c; } +/*----------------------------------------------------------------------------*/ + +/** Information specific to a P9 Axone processor chip. */ +/* NOTE: This structure is 4-byte word aligned. */ +typedef struct __attribute__((packed)) +{ + uint32_t isMaster : 1; /** 1 if this is the master PROC, 0 otherwise */ + uint32_t xbusMask : 3; /** Mask of configured XBUS units (0-2) */ + uint32_t obusMask : 4; /** Mask of configured OBUS units (0-3) */ + uint32_t ecMask : 24; /** Mask of configured EC units (0-23) */ + + uint32_t eqMask : 6; /** Mask of configured EQ units (0-5) */ + uint32_t exMask : 12; /** Mask of configured EX units (0-11) */ + uint32_t mcMask : 2; /** Mask of configured MC units (0-1) */ + uint32_t miMask : 4; /** Mask of configured MI units (0-3) */ + uint32_t mccMask : 8; /** Mask of configured MCC units (0-7) */ + + uint32_t cappMask : 2; /** Mask of configured CAPP units (0-1) */ + uint32_t pecMask : 3; /** Mask of configured PEC units (0-2) */ + uint32_t phbMask : 6; /** Mask of configured PHB units (0-5) */ + uint32_t omicMask : 6; /** Mask of configured OMIC units (0-5) */ + uint32_t npuMask : 3; /** Mask of configured NPU units (0-2) */ + uint32_t reserved : 12; + +} HOMER_ChipAxone_t; + +/** @return An initialized HOMER_ChipAxone_t struct. */ +static inline HOMER_ChipAxone_t HOMER_initChipAxone() +{ + HOMER_ChipAxone_t c; memset( &c, 0x00, sizeof(c) ); /* init to zero */ + + return c; +} + #endif /* __homerData_common_h */ -- cgit v1.2.1