From d85d3c5387ec9829ef29b98c16112210f343bae7 Mon Sep 17 00:00:00 2001 From: Zane Shelley Date: Thu, 6 Dec 2018 11:17:18 -0600 Subject: FIRDATA: add Axone memory subsystem SCOM support Change-Id: Iaa32e0cc115f5c72e2b8e19f55e3148d115b5aa8 RTC: 201994 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69530 Tested-by: FSP CI Jenkins Reviewed-by: Caleb N. Palmer Reviewed-by: Brian J. Stegmiller Reviewed-by: Martha Broyles --- src/occ_gpe0/firdata/scom_util.h | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) (limited to 'src/occ_gpe0/firdata/scom_util.h') diff --git a/src/occ_gpe0/firdata/scom_util.h b/src/occ_gpe0/firdata/scom_util.h index 1ec7fd2..278f304 100644 --- a/src/occ_gpe0/firdata/scom_util.h +++ b/src/occ_gpe0/firdata/scom_util.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ_405/firdata/scom_util.h $ */ +/* $Source: src/occ_gpe0/firdata/scom_util.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -73,6 +73,22 @@ typedef enum N2_PCIS0_0_RING_ID = 0x3, ///< PCIS0_0 } p9_n2_ring_id_t; +typedef enum +{ + P9A_MC_OMIC0_RING_ID = 0x4, ///< OMIC0 + P9A_MC_OMIC2_RING_ID = 0x6, ///< OMIC2 + P9A_MC_OMIC0_PPE_RING_ID = 0x9, ///< OMIC0 PPE + P9A_MC_OMIC2_PPE_RING_ID = 0xB, ///< OMIC2 PPE +} p9a_mc_ring_id_t; + +typedef enum +{ + P9A_MC_DSTL_CHAN0_SAT_ID = 0x4, ///< DSTL registers channel 0 + P9A_MC_DSTL_CHAN3_SAT_ID = 0x7, ///< DSTL registers channel 3 + P9A_MC_USTL_CHAN0_SAT_ID = 0x8, ///< USTL registers channel 0 + P9A_MC_USTL_CHAN3_SAT_ID = 0xB, ///< USTL registers channel 3 +} p9a_mc_sat_id_t; + /** @brief Performs a hardware scom on a regular register. * @param i_trgt The SCOM target. * @param i_addr 32-bit SCOM address. -- cgit v1.2.1