From 8636a4c381119451f8e411b615922aa59d39ce9b Mon Sep 17 00:00:00 2001 From: William Bryan Date: Wed, 11 Nov 2015 11:56:52 -0600 Subject: Update linkscript and init sections RTC: 134747 Change-Id: I3028b215f5560574e2ad5368f1a861bf46c61eb7 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21961 Reviewed-by: Wael Elessawy Tested-by: William A. Bryan --- src/occ_405/img_defs.mk | 5 +++++ src/occ_405/linkocc.cmd | 41 ++++++++++++++++++++++++++------------- src/occ_405/ssx_app_cfg.h | 4 ++++ src/occ_405/trac/trac_interface.c | 6 +++--- 4 files changed, 39 insertions(+), 17 deletions(-) (limited to 'src/occ_405') diff --git a/src/occ_405/img_defs.mk b/src/occ_405/img_defs.mk index 42bfbe9..6d10880 100644 --- a/src/occ_405/img_defs.mk +++ b/src/occ_405/img_defs.mk @@ -161,6 +161,10 @@ ifeq "$(SSX_TRACE_SUPPORT)" "" SSX_TRACE_SUPPORT = 1 endif +ifeq "$(SSX_USE_INIT_SECTION)" "" +SSX_USE_INIT_SECTION = 0 +endif + # Generate a 16bit trace string hash prefix value based on the name of this image. This will form # the upper 16 bits of the 32 bit trace hash values. ifndef SSX_TRACE_HASH_PREFIX @@ -177,6 +181,7 @@ GCC-DEFS += -DSSX_THREAD_SUPPORT=$(SSX_THREAD_SUPPORT) GCC-DEFS += -DPPC405_MMU_SUPPORT=$(PPC405_MMU_SUPPORT) GCC-DEFS += -DSSX_TRACE_SUPPORT=$(SSX_TRACE_SUPPORT) GCC-DEFS += -DSSX_TRACE_HASH_PREFIX=$(SSX_TRACE_HASH_PREFIX) +GCC-DEFS += -DSSX_USE_INIT_SECTION=$(SSX_USE_INIT_SECTION) GCC-DEFS += -DUSE_SSX_APP_CFG_H=1 GCC-DEFS += -D__SSX__=1 DEFS += $(GCC-DEFS) -DCONFIGURE_PTS_SLW=0 diff --git a/src/occ_405/linkocc.cmd b/src/occ_405/linkocc.cmd index 457d53b..dcf8f47 100755 --- a/src/occ_405/linkocc.cmd +++ b/src/occ_405/linkocc.cmd @@ -579,11 +579,27 @@ SECTIONS _SSX_FREE_END = _FIR_HEAP_SECTION_BASE - 1; + //////////////////////////////// + // Trace Buffers + //////////////////////////////// + __CUR_COUNTER__ = .; + _ERR_TRACE_BUFFER_BASE = 0xfffb4000; + _ERR_TRACE_BUFFER_SIZE = 0x2000; + _INF_TRACE_BUFFER_BASE = 0xfffb6000; + _INF_TRACE_BUFFER_SIZE = 0x2000; + _IMP_TRACE_BUFFER_BASE = 0xfffb8000; + _IMP_TRACE_BUFFER_SIZE = 0x2000; + . = _ERR_TRACE_BUFFER_BASE; + .err_trac . : {*(err_trac) . = ALIGN(_ERR_TRACE_BUFFER_SIZE);} > sram + .inf_trac . : {*(inf_trac) . = ALIGN(_INF_TRACE_BUFFER_SIZE);} > sram + .imp_trac . : {*(imp_trac) . = ALIGN(_IMP_TRACE_BUFFER_SIZE);} > sram + . = __CUR_COUNTER__; + //////////////////////////////// // FIR data heap section //////////////////////////////// __CUR_COUNTER__ = .; - _FIR_HEAP_SECTION_BASE = 0xfffb9000; + _FIR_HEAP_SECTION_BASE = 0xfffba000; _FIR_HEAP_SECTION_SIZE = 0x3000; . = _FIR_HEAP_SECTION_BASE; .firHeap . : {*(firHeap) . = ALIGN(1024);} > sram @@ -593,7 +609,7 @@ SECTIONS // FIR data parms section //////////////////////////////// __CUR_COUNTER__ = .; - _FIR_PARMS_SECTION_BASE = 0xfffbc000; + _FIR_PARMS_SECTION_BASE = 0xfffbd000; _FIR_PARMS_SECTION_SIZE = 0x1000; . = _FIR_PARMS_SECTION_BASE; .firParms . : {*(firParms) . = ALIGN(1024);} > sram @@ -604,9 +620,9 @@ SECTIONS //////////////////////////////// __CUR_COUNTER__ = .; - _LINEAR_WR_WINDOW_SECTION_BASE = 0xfffbd000; + _LINEAR_WR_WINDOW_SECTION_BASE = 0xfffbe000; _LINEAR_WR_WINDOW_SECTION_SIZE = 0x1000; - _LINEAR_RD_WINDOW_SECTION_BASE = 0xfffbe000; + _LINEAR_RD_WINDOW_SECTION_BASE = 0xfffbf000; _LINEAR_RD_WINDOW_SECTION_SIZE = 0x1000; . = _LINEAR_WR_WINDOW_SECTION_BASE; .linear_wr . : {*(linear_wr) . = ALIGN(_LINEAR_WR_WINDOW_SECTION_SIZE);} > sram @@ -617,22 +633,19 @@ SECTIONS //////////////////////////////// // TEMP/TODO: Previously, we were able to reclaim this space // by loading applets over init data. The init data - // takes up much more than 4K, but as we stand now (pre-sensors) - // it should be fine. However, we either need to - // put these sections back into the normal area - // with the rest of the code or figure out what to - // do with it to regain the space. + // takes up around 6K. It would be good to figure + // out what to do with it to regain the space. //////////////////////////////// - __CUR_COUNTER__ = .; - INIT_SECTION_BASE = 0xfffbf000; - . = INIT_SECTION_BASE; + //__CUR_COUNTER__ = .; + //INIT_SECTION_BASE = 0xfffbf000; + //. = INIT_SECTION_BASE; // Section aligned to 128 to make occ main application image 128 bytes // aligned which is requirement for applet manager when traversing through // all the image headers - initSection . : { *(initSection) init_text . = ALIGN(128);} > sram + //initSection . : { *(initSection) init_text . = ALIGN(128);} > sram - . = __CUR_COUNTER__; + //. = __CUR_COUNTER__; ////////////////////////////// // End Of Memory diff --git a/src/occ_405/ssx_app_cfg.h b/src/occ_405/ssx_app_cfg.h index f210acf..d576110 100755 --- a/src/occ_405/ssx_app_cfg.h +++ b/src/occ_405/ssx_app_cfg.h @@ -209,7 +209,11 @@ do { \ #define SSX_TRACE_TIMEBASE_HZ PPC405_TIMEBASE_HZ #endif /* APPCFG_USE_EXT_TIMEBASE_FOR_TRACE */ +#if SSX_USE_INIT_SECTION #define INIT_SEC_NM_STR "initSection" #define INIT_SECTION __attribute__ ((section (INIT_SEC_NM_STR))) +#else +#define INIT_SECTION +#endif #endif /*__SSX_APP_CFG_H__*/ diff --git a/src/occ_405/trac/trac_interface.c b/src/occ_405/trac/trac_interface.c index a0b4d3a..e31ec18 100755 --- a/src/occ_405/trac/trac_interface.c +++ b/src/occ_405/trac/trac_interface.c @@ -70,9 +70,9 @@ /// __attribute__ ((section (".noncacheable"))) /// when debugging on real HW, in case the OCC hangs and we can't access /// the cache to get coherent data. -uint8_t g_trac_inf_buffer[TRACE_BUFFER_SIZE]; -uint8_t g_trac_err_buffer[TRACE_BUFFER_SIZE]; -uint8_t g_trac_imp_buffer[TRACE_BUFFER_SIZE]; +uint8_t g_trac_inf_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".inf_trac"))); +uint8_t g_trac_err_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".err_trac"))); +uint8_t g_trac_imp_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".imp_trac"))); #if SIMICS_ENVIRONMENT // Necessary for use in Simics (to get address) -- cgit v1.2.1