From 8636a4c381119451f8e411b615922aa59d39ce9b Mon Sep 17 00:00:00 2001 From: William Bryan Date: Wed, 11 Nov 2015 11:56:52 -0600 Subject: Update linkscript and init sections RTC: 134747 Change-Id: I3028b215f5560574e2ad5368f1a861bf46c61eb7 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21961 Reviewed-by: Wael Elessawy Tested-by: William A. Bryan --- src/occ_405/trac/trac_interface.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/occ_405/trac') diff --git a/src/occ_405/trac/trac_interface.c b/src/occ_405/trac/trac_interface.c index a0b4d3a..e31ec18 100755 --- a/src/occ_405/trac/trac_interface.c +++ b/src/occ_405/trac/trac_interface.c @@ -70,9 +70,9 @@ /// __attribute__ ((section (".noncacheable"))) /// when debugging on real HW, in case the OCC hangs and we can't access /// the cache to get coherent data. -uint8_t g_trac_inf_buffer[TRACE_BUFFER_SIZE]; -uint8_t g_trac_err_buffer[TRACE_BUFFER_SIZE]; -uint8_t g_trac_imp_buffer[TRACE_BUFFER_SIZE]; +uint8_t g_trac_inf_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".inf_trac"))); +uint8_t g_trac_err_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".err_trac"))); +uint8_t g_trac_imp_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".imp_trac"))); #if SIMICS_ENVIRONMENT // Necessary for use in Simics (to get address) -- cgit v1.2.1