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* Memory Power Control when entering and exiting IPS (Idle Power Save)Wael El-Essawy2017-05-105-17/+281
| | | | | | | | | | | | | | | memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* PGPE init updatesChris Cain2017-04-131-0/+1
| | | | | | | | | | Change-Id: I0140184371619983fb38b27199f241efe7f30f16 RTC: 169886 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37770 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Changes For P9 EnablementWilliam Bryan2017-02-151-2/+2
| | | | | | | | | | | Change-Id: I37e8174bcc6e99f602a66cff077ef41ad889b19c RTC:165351 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34949 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* GPE Nest Frequency & Amester Name ChangesWilliam Bryan2017-02-141-2/+15
| | | | | | | | | | Change-Id: I46ee2502dcfd532b6ff30a32b0a645aecc285f21 RTC:168527 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36293 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Infrastructure for 24x7 data collectionmbroyles2017-02-143-8/+125
| | | | | | | | | | Change-Id: I16277d8290f65ba489da1421783f3705be7281f4 RTC: 168729 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36043 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Fix DIMM temperature readsChris Cain2017-02-144-23/+14
| | | | | | | | | | | | | FIFO4 register requires a 4 byte read or will hang. OCC will request 4 byte read, but only look at first 2 for temperature. FIFO register can only read one byte per request which is less efficient. Change-Id: Ia0bbbc70f5b7de76f1bea64279b2ff7dd5b5a861 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35974 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* dcom/ thread/ rtls/ TODO clean upAndres Lugo-Reyes2016-12-151-1/+1
| | | | | | | | | | | | | Also moved files common to occ_405/, occ_gpe0/, occ_gpe1/, etc, to a new common directory to keep src/ clean Change-Id: Ib45d70d048a135832592953c955a325d20fa19ae RTC: 163363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33640 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Update DIMM i2c divisor to increase clock rateChris Cain2016-12-121-1/+4
| | | | | | | | | | | | | | | In legacy mode, a divisor of 0x0049 will give approx freq of 391kHZ This value will allow margin for clock variation. For reference: 0x0177 is approx 77kHz 0x0048 is approx 396kHz 0x0049 is approx 391kHz Change-Id: I7ff68f414f5afff8ca6d96f51c0b2f25eeb0841f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33694 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Implement task_poke_watchdogsWael El-Essawy2016-11-032-2/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both master and slaves while in observation and active state and do the following: 1. Every time called: Enable/Reset the OCC heartbeat: done by a write to OCB OCC Heartbeat Register (set count to 8ms) 2. Every time called: Reset memory deadman timer for 1 MCA (skip if not present and just wait until next call to check next MCA to keep same timing of reset per MCA regardless of # present) Resetting the deadman is done by reading one of the memory performance counters, use one at SCOM offset 0x13C. NOTE: Will take 16ms (8 MCAs x 2ms) to reset all memory timers, this is fine since the shortest time the deadman timeout can be configured to is 28ms 3. Every 4ms (on tick 1 only) : Verify PGPE is still functional by reading PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no change to the PGPE Beacon count then log an error and request reset. In addition, this commit adds entries for the PGPE image header and shared SRAM in the TLB, and partially reads PGPE image header parameters. Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39 RTC: 154960 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Changes for GCC 4.9 and OPWilliam Bryan2016-10-241-9/+5
| | | | | | | | Change-Id: I95ddff4b290fcf3eab617a674afc489698c78a1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31563 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Sensor List Checking & Make ImprovementsWilliam Bryan2016-10-142-3/+30
| | | | | | | | | | Change-Id: Id75021aeeb75c8d63b85e8a80bf09646b8bcf215 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30752 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* SSX Runtime Environment CheckWilliam Bryan2016-10-111-1/+4
| | | | | | | | | | | RTC: 139829 Change-Id: Ic43ab936fd9d9b0d41270bbea50cd3969d9f8432 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30063 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable FW Timing SensorsWael El-Essawy2016-09-234-2/+65
| | | | | | | | | | | Enable scheduling of the GPE NOP task to do GPE timings and verify all sensors being updated in amec_update_fw_sensors() are being populated correctly. Change-Id: I623dd7518be9a8736e601c7d2fa748097a4d773a RTC: 141299 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29849 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Memory Temperature Control Loop (memory throttling)Wael El-Essawy2016-09-165-3/+127
| | | | | | | | | | | | * Memory throttling due to over temp * Throttle when reach timeout getting new temperature readings * Log error for temperature exceeding ERROR threshold Change-Id: I089c88aadba84e7296ad87b8cb87fa8c045ff912 RTC: 131188 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28933 Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* Update build process for OpenPOWERWilliam Bryan2016-08-262-8/+10
| | | | | | | | | | Change-Id: I0852869bdc9d527c54112de7223b6e95111c750a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28741 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Remove IBM Confidential DisclaimersWilliam Bryan2016-08-023-6/+50
| | | | | | | | Change-Id: Ie3dcd5b6cee3e6b191cf136d30af634c9966318e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27718 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Delete unused files, update PK, and use new compilersWilliam Bryan2016-07-293-46/+77
| | | | | | | | Change-Id: I9e4951a2cebd204d1ea752c63e3f2b532ad3a2db Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27465 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Build full OCC image and update build processWilliam Bryan2016-05-043-13/+69
| | | | | | | | Change-Id: I8e6d716a48f30021b653e850c74deb7526cfe293 RTC:133001 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22155 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Implement I2C locking with hostChris Cain2016-03-012-18/+18
| | | | | | | | | | Change-Id: I9e99e799e0df442bebef473360ca87d564f5ddaf RTC: 140545 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/12898 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Implement code to read DIMM temperaturesChris Cain2016-01-277-22/+853
| | | | | | | | | | Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38 RTC: 140093 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
* Fixed warnings and added -Werror CFLAGWilliam Bryan2015-11-022-2/+50
| | | | | | | | | | Fixed adding traces in error handling code RTC: 137993 Change-Id: Ifc48da76bf2af90435b708c3415b5f456957911b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21097 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC: Init and start GPE1Chris Cain2015-09-249-0/+693
Change-Id: I2f1ef0a01497d46884eed25f1f63f9ebfcaf1da4 RTC: 133841 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20729 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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