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* Support for NVDIMMsChris Cain2018-09-261-2/+1
| | | | | | | | | | Change-Id: I8ccf44287bc72a73b16662ba29b71e731c70b30e RTC:173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65917 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Enable safe mode memory throttlingmbroyles2017-08-291-7/+8
| | | | | | | | | | Change-Id: I62cf1be6a24e02a2cd59b75416d26596a4f2f81d RTC: 169887 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45169 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Memory Power Control when entering and exiting IPS (Idle Power Save)Wael El-Essawy2017-05-101-0/+218
memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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