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* Move I2C info to commonWilliam Bryan2017-08-241-0/+1
| | | | | | | | | Change-Id: I64c0213d7320b484d165fe0094e2e0286f730957 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44690 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Delay DIMM collection for 60 seconds to prevent I2C bus contention with OPALChris Cain2017-08-161-1/+1
| | | | | | | | | Change-Id: Ia296230333cce7be3e2db385fc2293f6374ef104 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44693 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Set MSR before DIMM temp task to avoid machine checkWilliam Bryan2017-08-031-1/+21
| | | | | | | | | | Change-Id: I95ce4cccae9fe315570cd2bd7347c370781dc745 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44178 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Fix DIMM temperature readsChris Cain2017-02-141-9/+6
| | | | | | | | | | | | | FIFO4 register requires a 4 byte read or will hang. OCC will request 4 byte read, but only look at first 2 for temperature. FIFO register can only read one byte per request which is less efficient. Change-Id: Ia0bbbc70f5b7de76f1bea64279b2ff7dd5b5a861 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35974 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Update DIMM i2c divisor to increase clock rateChris Cain2016-12-121-1/+4
| | | | | | | | | | | | | | | In legacy mode, a divisor of 0x0049 will give approx freq of 391kHZ This value will allow margin for clock variation. For reference: 0x0177 is approx 77kHz 0x0048 is approx 396kHz 0x0049 is approx 391kHz Change-Id: I7ff68f414f5afff8ca6d96f51c0b2f25eeb0841f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33694 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Memory Temperature Control Loop (memory throttling)Wael El-Essawy2016-09-161-1/+1
| | | | | | | | | | | | * Memory throttling due to over temp * Throttle when reach timeout getting new temperature readings * Log error for temperature exceeding ERROR threshold Change-Id: I089c88aadba84e7296ad87b8cb87fa8c045ff912 RTC: 131188 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28933 Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* Implement I2C locking with hostChris Cain2016-03-011-3/+3
| | | | | | | | | | Change-Id: I9e99e799e0df442bebef473360ca87d564f5ddaf RTC: 140545 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/12898 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Implement code to read DIMM temperaturesChris Cain2016-01-271-0/+511
Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38 RTC: 140093 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
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