| Commit message (Collapse) | Author | Age | Files | Lines |
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Errors will be detected by the PGPE beacon.
Change-Id: I2d24ec9becc319a1cf1fce6b06714ac638faade1
RTC: 134619
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49421
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I7cea001833615dc3bcb6a282c20f205f1e7d9d87
CQ:SW401110
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46831
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
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Change-Id: I870baf3fc389995b8be30d489e531d131a7c84a0
RTC: 170963
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40611
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I0a7e9fe5c854ce17602c4c0293fd59f8c4a7c7b2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40419
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Id709ec36d82a2b6c03b1a4b901cf64f45f241d36
RTC: 163934
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39562
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I0140184371619983fb38b27199f241efe7f30f16
RTC: 169886
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37770
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I37e8174bcc6e99f602a66cff077ef41ad889b19c
RTC:165351
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34949
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin,
G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter
Block)
2. When frequency config data packet is received and OCC is NOT
already in Active state: Send IPC command to PGPE to set pState
clips to be wide open from min frequency to turbo
First verify min/max frequency from TMGT is within what
PGPE allows saved in G_proc_fmax and G_proc_fmin if not
within bounds trace and clip to G_proc_fmax/fmin)
3. Transition to active state: Send IPC command to PGPE to start
pState protocol (give correct data for OCC vs OPAL in control of
Pstates) and if OPAL system update OPAL shared memory with Pstate
information.
4. amec_slv_freq_smh(): Send IPC command to PGPE to set requested
pState (PowerVM) or set clips (OPAL).
5. Address all the TODO/TEMP/#if 0 in amec_freq.c either remove
or add RTC# for when it will be addressed
Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd
RTC: 130201
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both
master and slaves while in observation and active state and do the following:
1. Every time called: Enable/Reset the OCC heartbeat: done by a write to
OCB OCC Heartbeat Register (set count to 8ms)
2. Every time called: Reset memory deadman timer for 1 MCA (skip if not
present and just wait until next call to check next MCA to keep same
timing of reset per MCA regardless of # present) Resetting the deadman
is done by reading one of the memory performance counters, use one at
SCOM offset 0x13C. NOTE: Will take 16ms (8 MCAs x 2ms) to reset all
memory timers, this is fine since the shortest time the deadman timeout
can be configured to is 28ms
3. Every 4ms (on tick 1 only) : Verify PGPE is still functional by reading
PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no
change to the PGPE Beacon count then log an error and request reset.
In addition, this commit adds entries for the PGPE image header and shared
SRAM in the TLB, and partially reads PGPE image header parameters.
Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39
RTC: 154960
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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Fixed adding traces in error handling code
RTC: 137993
Change-Id: Ifc48da76bf2af90435b708c3415b5f456957911b
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21097
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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In the current OCC phase, many tasks were removed from the global task table
(G_task_table) array, because the OCC code is not ready to schedule them every
tick. A bag was introduced when such entries were commented in the
G_task_table array in the rtes_tables.c file, without removing the
corresponding entries from the corresponding task_id_t enum in the rtls.h
header file.
The result was wrong mapping between the tasks the corresponding function
pointers (func_ptr) entries, and hence, the wrong GPE codes were called
from the OCC via the IPC messages.
A fix was done by eliminating the corresponding task entries from the
task_id_t enum, and remove references to commented out enums,
and hence, the discrepancy between the two structures was resolved.
In addition, the pmc watchdog register, PMC_STATUS_REG @ 0x40010048
used by the OCC for pmc heartbeat on P8 is no longer defined in SIMICS on P9
The code line that accesses this register was commented out, and it should
be later replaced by a new PGPE heartbeat register, when the design is ready.
Also, the initAppletAddr() routine was commented out, since the applet image
header data structure is currently not setup properly in simics.
RTC: 137914
RTC: 135989
Change-Id: I32abf6edfd2536af58b24c97d26eb14902ee6a11
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20975
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
Tested-by: Fadi Kassem <fmkassem@us.ibm.com>
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Change-Id: Ic5c0536de429106975f5b5b0831c645d6f53e86c
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19650
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I2328b1e86d59e3788910687d762fb70ec680058f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19503
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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