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* Characterization state meltbox supportmbroyles2018-02-161-259/+251
| | | | | | | | | | | | Prevent temperature timeout errors during state transition Misc state characterization and observation state change fixes Change-Id: Ideeaab96689b145ed960aef5743b8c3947e4ffeb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53674 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Handle PGPE timeouts as workaround for prolonged droop eventsmbroyles2018-01-151-81/+125
| | | | | | | | | | | | | | Add "CLIP" information to poll response Fix incorrectly throttling due to power when all cores are in stop 2 or greater Change-Id: I502cc65ad8c4cffd7f9a1442fd4de185f3cac6e2 RTC: 183700 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51741 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Prevent safe mode when going to nominal and no cores configuredAndres Lugo-Reyes2017-12-051-56/+57
| | | | | | | | | | Change-Id: I2061b842350344250775fe3ff6179a13ed4fbdb7 CQ:SW409482 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50511 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
* Stop DIMM and GPU accesses when moving to standby or safe stateChris Cain2017-11-141-0/+17
| | | | | | | | | Change-Id: Id8cfd8f0d4e6643921faeb69729d7e68f47ad8ed Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49552 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Prevent WOF related error logs in states that don't support WOFAndres Lugo-Reyes2017-10-191-0/+15
| | | | | | | | | Change-Id: Ica38f94423a763d116ad24082e776975828f6fde CQ:SW404551 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48300 Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Prevent PGPE IPC communication if all cores are deconfiguredAndres Lugo-Reyes2017-10-161-78/+112
| | | | | | | | | | Change-Id: I7cea001833615dc3bcb6a282c20f205f1e7d9d87 CQ:SW401110 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46831 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
* Set Pstate to nominal prior to giving ownership to hostmbroyles2017-08-041-1/+33
| | | | | | | | | Change-Id: If3ca5185bafda7d15e639e0f32c1b4ea3eba0c4c RTC: 174964 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43959 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* rt_xstop_analysis: compile all of firdata on gpe0Prachi Gupta2017-07-211-2/+1
| | | | | | | | | | | Change-Id: I804cdf63879a2b80c9e14149e45ee665240c4a88 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43244 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Fix excessive traces for BCE requests, slave data collection and opal updatesmbroyles2017-07-191-92/+72
| | | | | | | | | | | | | | Correct power cap information in OPAL shared memory Add non-zero error history counts to poll response Fix Characterization to Active State change failure Change-Id: I92b783b631e79786e6190a4def520fee32c2cc7c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43216 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC support for no APSS and new GPU Config Datambroyles2017-06-121-1/+6
| | | | | | | | | Change-Id: Id58a06378f3c0a7fd9fb436b96823eca15028031 RTC: 160889 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41513 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Remove antiquated PMC codeWilliam Bryan2017-05-151-2/+1
| | | | | | | | | Change-Id: I0a7e9fe5c854ce17602c4c0293fd59f8c4a7c7b2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40419 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Don't log an error within PGPE callbackWilliam Bryan2017-04-281-95/+36
| | | | | | | | | | Change-Id: I619513860541b7a98664b42894be5b9dd5f7ed30 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39811 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Merge latest hcode headers into OCCChris Cain2017-04-131-1/+1
| | | | | | | | | | Change-Id: I1365d14bee48c287fcfd0faab8ba8a1a517e5bcb RTC: 169886 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38107 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* PGPE init updatesChris Cain2017-04-131-30/+27
| | | | | | | | | | Change-Id: I0140184371619983fb38b27199f241efe7f30f16 RTC: 169886 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37770 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Fix warnings in newer GCC versionsWilliam Bryan2017-03-271-2/+2
| | | | | | | | | | Change-Id: If0a730a7539aa5a4dcc43725a3c4fbda570cfa46 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38411 Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Pstate Changes and APSS Failure HandlingWilliam Bryan2017-03-151-33/+39
| | | | | | | | | | Change-Id: I97390f74d07b8ce8dad1519be4f7aacb3b9cef46 RTC:163356 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37299 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* New mfg test command to set per quad pstatembroyles2017-03-131-0/+5
| | | | | | | | | | Change-Id: I3f3b187608b0bfaf83cfa612358b40257db7d5b6 RTC: 170583 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37765 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Remove verify pstatembroyles2017-03-031-1/+1
| | | | | | | | | | | RTC: 164718 Change-Id: I4c02e5d118d6492dd48fac972c5d8046aa281f8e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37479 Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* fix SRC to eliminate firestation errorWael El-Essawy2017-02-241-2/+2
| | | | | | | | Change-Id: I7ead3b6e4b161601d1a4310dd12b4e222620e614 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36974 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Characterization state, new state transitions and Active to Observation stateWael El-Essawy2017-02-221-189/+782
| | | | | | | | | | | | | | Support for new characterization state changes used by manufacturing. Observation state and new characterization state. Details in version 0.10 OCC Interface Specifications. Change-Id: I2ff0fc9327ad75e54c0a47cf42946e58f387522b RTC: 163268 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35517 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* occ_405 dir cleanup from TODOsWael El-Essawy2017-02-151-3/+38
| | | | | | | | | | | | either implement todos or refer to planned RTC Change-Id: Id9209bd9a89e0d38a56e2999f6e7fe2d16dd6433 RTC: 163361 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35861 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Pstates Support in OCCWael El-Essawy2017-01-271-17/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin, G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter Block) 2. When frequency config data packet is received and OCC is NOT already in Active state: Send IPC command to PGPE to set pState clips to be wide open from min frequency to turbo First verify min/max frequency from TMGT is within what PGPE allows saved in G_proc_fmax and G_proc_fmin if not within bounds trace and clip to G_proc_fmax/fmin) 3. Transition to active state: Send IPC command to PGPE to start pState protocol (give correct data for OCC vs OPAL in control of Pstates) and if OPAL system update OPAL shared memory with Pstate information. 4. amec_slv_freq_smh(): Send IPC command to PGPE to set requested pState (PowerVM) or set clips (OPAL). 5. Address all the TODO/TEMP/#if 0 in amec_freq.c either remove or add RTC# for when it will be addressed Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd RTC: 130201 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* OCC-OPAL Shared Memory Interface: Dynamic data updatesWael El-Essawy2016-11-171-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | update the following in OPAL shared memory when any of these pieces change: * OCC State * CPU Throttle status * memory throttle status * quick power drop * power shifting ratio * power cap type * Min power cap * Max power cap * current power cap *** When either throttle status bytes change alert OPAL of shared memory interface change via setting SCOM bits 3 in the ext_intr_reason field of OCC Misc register and bit 0 (core_ext_intr) to generate the interrupt. Change-Id: Ic88a38aba4b84fb247389e712da2e326c2cd9c53 RTC: 130202 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32688 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* OCC Active state changes required for SimicsChris Cain2016-10-141-1/+0
| | | | | | | | | Change-Id: Ic6e65bcddaefd5213042707feffcf1272133e532 RTC: 161266 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31190 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* SSX Runtime Environment CheckWilliam Bryan2016-10-111-0/+6
| | | | | | | | | | | RTC: 139829 Change-Id: Ic43ab936fd9d9b0d41270bbea50cd3969d9f8432 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30063 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Processor Thermal Control LoopWael El-Essawy2016-06-131-109/+10
| | | | | | | | | | | | | | | | | | | Enable processor thermal control loop. Enable frequency votes due to thermal and error reading temperatures. Verify The following: *Error log generation when a proc reaches Error limit *Reach throttle points when: -- Processor reached over temperature limit -- Processor temperature sensors timeout enable transition to active mode Change-Id: Iae24f64a872e031e1cf93ff0d9248d3fa3847ed7 RTC: 130210 RTC: 133942 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25458 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Pstate Infrastructure & Support config data required for active stateWael El-Essawy2016-05-251-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | - Support all config data required for active state. - Set 'active ready' bit in poll response when all config data has been received. - Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist. - Put in TODO call PGPE to enable pstates this will also be telling PGPE how to set PMCR mode register (OCC control pstates or OPAL). - Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard codes until PGPE is available. - Call to "proc_pstate_initialize()" moved to state transition to observation - Cleanup proc_freq2pstate() - rewrite amec_slv_freq_smh() - the calls to proc_set_core_bounds() and proc_set_core_pstate() will be replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores or set pstate for all given cores. - Remove all DCM related code. Change-Id: I449d188b2cffc345afca19717dcbea037f159114 RTC:130224 RTC:150935 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Changed poll response to version 0x20William Bryan2016-01-271-9/+3
| | | | | | | | | RTC: 143441 Change-Id: Ib964b5f8d8b00029971935ffc8eb957975dc6cce Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23406 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Implement code to read DIMM temperaturesChris Cain2016-01-271-30/+2
| | | | | | | | | | Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38 RTC: 140093 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
* Enable set role command and retry APSS initWilliam Bryan2015-12-041-8/+6
| | | | | | | | | | | | | | | Added changes to enable Simics console tracing Enabled memory configuration packet Removed Pstate data config command RTC: 141646 RTC: 142030 Change-Id: I85807a76bb9364b1f3b865fa91c28a3f46446531 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22434 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable the poll and data configuration commandsWilliam Bryan2015-11-161-8/+4
| | | | | | | | | RTC: 140898 Change-Id: If9ef2233a631bb857a095746b095a06092e4aff0 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21976 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Fixed warnings and added -Werror CFLAGWilliam Bryan2015-11-021-9/+6
| | | | | | | | | | Fixed adding traces in error handling code RTC: 137993 Change-Id: Ifc48da76bf2af90435b708c3415b5f456957911b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21097 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* fix rtls and applet address bugs and comment out pmc watchdog register accessWael El-Essawy2015-10-091-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current OCC phase, many tasks were removed from the global task table (G_task_table) array, because the OCC code is not ready to schedule them every tick. A bag was introduced when such entries were commented in the G_task_table array in the rtes_tables.c file, without removing the corresponding entries from the corresponding task_id_t enum in the rtls.h header file. The result was wrong mapping between the tasks the corresponding function pointers (func_ptr) entries, and hence, the wrong GPE codes were called from the OCC via the IPC messages. A fix was done by eliminating the corresponding task entries from the task_id_t enum, and remove references to commented out enums, and hence, the discrepancy between the two structures was resolved. In addition, the pmc watchdog register, PMC_STATUS_REG @ 0x40010048 used by the OCC for pmc heartbeat on P8 is no longer defined in SIMICS on P9 The code line that accesses this register was commented out, and it should be later replaced by a new PGPE heartbeat register, when the design is ready. Also, the initAppletAddr() routine was commented out, since the applet image header data structure is currently not setup properly in simics. RTC: 137914 RTC: 135989 Change-Id: I32abf6edfd2536af58b24c97d26eb14902ee6a11 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20975 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Tested-by: Fadi Kassem <fmkassem@us.ibm.com>
* Enable command handler thread and misc cleanupWilliam Bryan2015-10-071-4/+1
| | | | | | | | | | | | | | 1. The command handler thread now starts running. 2. Disabled just about all of the command handler functions so that they can be enabled as they are implemented and needed. 3. Fixed a bug in the linker script where the response buffer is put in the incorrect offset. Change-Id: Ia169cb9fef3fd91d5667e636569ada9d83c02b3b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20927 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* OCC405 Stripped Down and CompilesWilliam Bryan2015-08-071-10/+27
| | | | | | | | Change-Id: Ic5c0536de429106975f5b5b0831c645d6f53e86c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19650 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* new ssx and lib filesWilliam Bryan2015-08-031-0/+743
Change-Id: I2328b1e86d59e3788910687d762fb70ec680058f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19503 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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