| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: Id7b66bab383d69017469aced62ec23bb7f7faaef
RTC: 133939
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51369
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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When redundant power supply policy is disabled:
1. Skip power capping algorithm when in oversubscription
2. No power brake support (don't set the GPIO to enable the automatic HW power
braking)
3. Remove clipping to turbo when in oversubscription
Initialize frequency votes to prevent throttling when booted in
oversubscription.
Allow truncated exception buffer data to be parsed.
Change-Id: I4fef673feb0a3d0025e00d8fd219cf4cc24d8685
CQ: SW408974
CQ: SW409666
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50071
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: Ie5771b33c13cd57822a8b6f1406a92c4516088c0
RTC: 180397
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48563
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: I14108b7a5ea7ce4e3649ab164a6e6c905274c635
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46765
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: I8e2b597773c940ebc79972974a95fb323ea26660
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48065
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: Ibae3b77afbb42a34efe622c5da3aba391ee92bae
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43288
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: Ic53e27d851023d99440aa1bfbdf5307920af3397
RTC: 158812
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42512
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Shawn M. McCarney <shawnmm@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Id58a06378f3c0a7fd9fb436b96823eca15028031
RTC: 160889
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41513
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I9c8aa4e4cd2272c213d063a27c019396928ebd94
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40290
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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memory power control settings for IPS/default modes - as defined by
memory config data packet version 0x21 - are applied to memory
power control registers of all configured ports whenever the OCC
enters/exits IPS, respectively.
Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523
RTC: 165546
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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Performed the following sensor renames required by this RTC story:
FREQA4MSP0Cy -> FREQACy
UTIL4MSP0Cy -> UTILCy
PWR250US -> PWRSYS
PWR250USP0 -> PWRPROC
Also renamed the following related symbols:
* Associated sensor_t field names in the amec_sys_t data structure
* Mini-sensor field names
* Parent sensors that contain a vector iterating over renamed sensors
Change-Id: I1e9e17661e5730ed6309fc7617c61bd973d2e44f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39772
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I3f3b187608b0bfaf83cfa612358b40257db7d5b6
RTC: 170583
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37765
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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the OCC maintains support for version 0x20
Change-Id: I06e637db202602e3823ffeceb56d482545b1016a
RTC: 165546
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36733
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Tested-by: Wael El-Essawy <welessa@us.ibm.com>
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FIFO4 register requires a 4 byte read or will hang.
OCC will request 4 byte read, but only look at first 2 for temperature.
FIFO register can only read one byte per request which is less efficient.
Change-Id: Ia0bbbc70f5b7de76f1bea64279b2ff7dd5b5a861
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35974
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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- monitor VR Fan (over-temperature) and OC (over-current)
- add VR Fan sensor to poll response (Temperature FRU type: VRM)
- log mfg error for OC
- add error history counters for each
Change-Id: Ia552aa2cc2db8adebcbbd928c146a057bb120c73
RTC: 132561
RTC: 132560
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35358
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin,
G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter
Block)
2. When frequency config data packet is received and OCC is NOT
already in Active state: Send IPC command to PGPE to set pState
clips to be wide open from min frequency to turbo
First verify min/max frequency from TMGT is within what
PGPE allows saved in G_proc_fmax and G_proc_fmin if not
within bounds trace and clip to G_proc_fmax/fmin)
3. Transition to active state: Send IPC command to PGPE to start
pState protocol (give correct data for OCC vs OPAL in control of
Pstates) and if OPAL system update OPAL shared memory with Pstate
information.
4. amec_slv_freq_smh(): Send IPC command to PGPE to set requested
pState (PowerVM) or set clips (OPAL).
5. Address all the TODO/TEMP/#if 0 in amec_freq.c either remove
or add RTC# for when it will be addressed
Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd
RTC: 130201
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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- add support for reading voltage/current from AVS Bus
on Vdd and Vdn rails (on alternating ticks)
- remove overcurrent code
- remove voltage uplift code
- other minor cleanup
RTC: 137620
Change-Id: I774a2421059ab3684e3b790938429e9e77ae2b76
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31923
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both
master and slaves while in observation and active state and do the following:
1. Every time called: Enable/Reset the OCC heartbeat: done by a write to
OCB OCC Heartbeat Register (set count to 8ms)
2. Every time called: Reset memory deadman timer for 1 MCA (skip if not
present and just wait until next call to check next MCA to keep same
timing of reset per MCA regardless of # present) Resetting the deadman
is done by reading one of the memory performance counters, use one at
SCOM offset 0x13C. NOTE: Will take 16ms (8 MCAs x 2ms) to reset all
memory timers, this is fine since the shortest time the deadman timeout
can be configured to is 28ms
3. Every 4ms (on tick 1 only) : Verify PGPE is still functional by reading
PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no
change to the PGPE Beacon count then log an error and request reset.
In addition, this commit adds entries for the PGPE image header and shared
SRAM in the TLB, and partially reads PGPE image header parameters.
Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39
RTC: 154960
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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RTC: 162291
Change-Id: I979615313a9c5e860fa570736e0ce598b978f877
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31416
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: I7c57c072f4f84f02ce7bbc5f95c80a4901d6c9a2
RTC:160341
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30180
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I98b745ccb56d89d066508d4195250b1bf446dbc6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29898
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Populate the "FREQ" and "CAPS" sections with data in the
poll response according to the interface spec
Change-Id: I65ac8602776f12e796d3c6cae8e49215177f942c
RTC: 143442
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29913
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Tested-by: Wael El-Essawy <welessa@us.ibm.com>
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* Memory throttling due to over temp
* Throttle when reach timeout getting new temperature readings
* Log error for temperature exceeding ERROR threshold
Change-Id: I089c88aadba84e7296ad87b8cb87fa8c045ff912
RTC: 131188
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28933
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Tested-by: Wael El-Essawy <welessa@us.ibm.com>
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RTC:148388
Change-Id: Iae66cd0a73032fa908eb96a149d4163397c2e275
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27781
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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- Support all config data required for active state.
- Set 'active ready' bit in poll response when all config data has been received.
- Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist.
- Put in TODO call PGPE to enable pstates this will also be telling PGPE how to
set PMCR mode register (OCC control pstates or OPAL).
- Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard
codes until PGPE is available.
- Call to "proc_pstate_initialize()" moved to state transition to observation
- Cleanup proc_freq2pstate()
- rewrite amec_slv_freq_smh()
- the calls to proc_set_core_bounds() and proc_set_core_pstate() will be
replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores
or set pstate for all given cores.
- Remove all DCM related code.
Change-Id: I449d188b2cffc345afca19717dcbea037f159114
RTC:130224
RTC:150935
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977
Tested-by: FSP CI Jenkins
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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Change-Id: I445072e20d599e30f80cc8059b3f3b2a956c453e
RTC: 133154
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22005
Tested-by: FSP CI Jenkins
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38
RTC: 140093
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: FSP CI Jenkins
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
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Added configuration data debug command
RTC: 141643
Change-Id: I3d98321508780c25795d66a8d353c36593448a6e
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22549
Tested-by: FSP CI Jenkins
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
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Added changes to enable Simics console tracing
Enabled memory configuration packet
Removed Pstate data config command
RTC: 141646
RTC: 142030
Change-Id: I85807a76bb9364b1f3b865fa91c28a3f46446531
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22434
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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RTC: 139700
Change-Id: I932fcba9f006138e927d2c1836b09617500e468b
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21355
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Tested-by: FSP CI Jenkins
Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
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Change-Id: Ic5c0536de429106975f5b5b0831c645d6f53e86c
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19650
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I2328b1e86d59e3788910687d762fb70ec680058f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19503
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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