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* OCC error log clean upmbroyles2018-01-051-3/+0
| | | | | | | | | | Change-Id: Id7b66bab383d69017469aced62ec23bb7f7faaef RTC: 133939 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51369 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Handle redundant power supply policyChris Cain2017-12-011-1/+2
| | | | | | | | | | | | | | | | | | | | When redundant power supply policy is disabled: 1. Skip power capping algorithm when in oversubscription 2. No power brake support (don't set the GPIO to enable the automatic HW power braking) 3. Remove clipping to turbo when in oversubscription Initialize frequency votes to prevent throttling when booted in oversubscription. Allow truncated exception buffer data to be parsed. Change-Id: I4fef673feb0a3d0025e00d8fd219cf4cc24d8685 CQ: SW408974 CQ: SW409666 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50071 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* VRM Vdd Thermal Control Loopmbroyles2017-10-261-5/+6
| | | | | | | | | | | Change-Id: Ie5771b33c13cd57822a8b6f1406a92c4516088c0 RTC: 180397 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48563 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Support for GPU config format version 2mbroyles2017-10-181-1/+10
| | | | | | | | | Change-Id: I14108b7a5ea7ce4e3649ab164a6e6c905274c635 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46765 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* VRM Vdd Interfacesmbroyles2017-10-161-0/+3
| | | | | | | | | Change-Id: I8e2b597773c940ebc79972974a95fb323ea26660 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48065 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Fix IPS enter/exit time happening in half the time it should bembroyles2017-07-211-6/+1
| | | | | | | | | Change-Id: Ibae3b77afbb42a34efe622c5da3aba391ee92bae Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43288 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Support new in-band command/response interface and clear sensor commandmbroyles2017-06-301-0/+1
| | | | | | | | | | Change-Id: Ic53e27d851023d99440aa1bfbdf5307920af3397 RTC: 158812 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42512 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Shawn M. McCarney <shawnmm@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC support for no APSS and new GPU Config Datambroyles2017-06-121-0/+16
| | | | | | | | | Change-Id: Id58a06378f3c0a7fd9fb436b96823eca15028031 RTC: 160889 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41513 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Doorbell reorganizationWilliam Bryan2017-05-101-2/+14
| | | | | | | | | Change-Id: I9c8aa4e4cd2272c213d063a27c019396928ebd94 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40290 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Memory Power Control when entering and exiting IPS (Idle Power Save)Wael El-Essawy2017-05-101-12/+3
| | | | | | | | | | | | | | | memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* OCC: Non-GPU Sensors to main memory: Phase 1Shawn McCarney2017-04-271-1/+1
| | | | | | | | | | | | | | | | | | | | Performed the following sensor renames required by this RTC story: FREQA4MSP0Cy -> FREQACy UTIL4MSP0Cy -> UTILCy PWR250US -> PWRSYS PWR250USP0 -> PWRPROC Also renamed the following related symbols: * Associated sensor_t field names in the amec_sys_t data structure * Mini-sensor field names * Parent sensors that contain a vector iterating over renamed sensors Change-Id: I1e9e17661e5730ed6309fc7617c61bd973d2e44f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39772 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* New mfg test command to set per quad pstatembroyles2017-03-131-1/+0
| | | | | | | | | | Change-Id: I3f3b187608b0bfaf83cfa612358b40257db7d5b6 RTC: 170583 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37765 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Add support for memory config command version 0x21Wael El-Essawy2017-02-231-0/+12
| | | | | | | | | | | | the OCC maintains support for version 0x20 Change-Id: I06e637db202602e3823ffeceb56d482545b1016a RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36733 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* Fix DIMM temperature readsChris Cain2017-02-141-1/+0
| | | | | | | | | | | | | FIFO4 register requires a 4 byte read or will hang. OCC will request 4 byte read, but only look at first 2 for temperature. FIFO register can only read one byte per request which is less efficient. Change-Id: Ia0bbbc70f5b7de76f1bea64279b2ff7dd5b5a861 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35974 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Add VR Fan and OC support via AVSBUSChris Cain2017-01-271-1/+0
| | | | | | | | | | | | | | | - monitor VR Fan (over-temperature) and OC (over-current) - add VR Fan sensor to poll response (Temperature FRU type: VRM) - log mfg error for OC - add error history counters for each Change-Id: Ia552aa2cc2db8adebcbbd928c146a057bb120c73 RTC: 132561 RTC: 132560 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35358 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Pstates Support in OCCWael El-Essawy2017-01-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin, G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter Block) 2. When frequency config data packet is received and OCC is NOT already in Active state: Send IPC command to PGPE to set pState clips to be wide open from min frequency to turbo First verify min/max frequency from TMGT is within what PGPE allows saved in G_proc_fmax and G_proc_fmin if not within bounds trace and clip to G_proc_fmax/fmin) 3. Transition to active state: Send IPC command to PGPE to start pState protocol (give correct data for OCC vs OPAL in control of Pstates) and if OPAL system update OPAL shared memory with Pstate information. 4. amec_slv_freq_smh(): Send IPC command to PGPE to set requested pState (PowerVM) or set clips (OPAL). 5. Address all the TODO/TEMP/#if 0 in amec_freq.c either remove or add RTC# for when it will be addressed Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd RTC: 130201 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Code updates for AVS Bus data collectionChris Cain2016-11-091-14/+11
| | | | | | | | | | | | | | | | - add support for reading voltage/current from AVS Bus on Vdd and Vdn rails (on alternating ticks) - remove overcurrent code - remove voltage uplift code - other minor cleanup RTC: 137620 Change-Id: I774a2421059ab3684e3b790938429e9e77ae2b76 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31923 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Implement task_poke_watchdogsWael El-Essawy2016-11-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both master and slaves while in observation and active state and do the following: 1. Every time called: Enable/Reset the OCC heartbeat: done by a write to OCB OCC Heartbeat Register (set count to 8ms) 2. Every time called: Reset memory deadman timer for 1 MCA (skip if not present and just wait until next call to check next MCA to keep same timing of reset per MCA regardless of # present) Resetting the deadman is done by reading one of the memory performance counters, use one at SCOM offset 0x13C. NOTE: Will take 16ms (8 MCAs x 2ms) to reset all memory timers, this is fine since the shortest time the deadman timeout can be configured to is 28ms 3. Every 4ms (on tick 1 only) : Verify PGPE is still functional by reading PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no change to the PGPE Beacon count then log an error and request reset. In addition, this commit adds entries for the PGPE image header and shared SRAM in the TLB, and partially reads PGPE image header parameters. Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39 RTC: 154960 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Support new APSS Function IDsmbroyles2016-10-201-8/+14
| | | | | | | | | | | RTC: 162291 Change-Id: I979615313a9c5e860fa570736e0ce598b978f877 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31416 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Save Core & Quad DTS AvgsWilliam Bryan2016-10-111-0/+1
| | | | | | | | | | Change-Id: I7c57c072f4f84f02ce7bbc5f95c80a4901d6c9a2 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30180 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable power capping and oversubscription. RTC:137621 RTC:133156mbroyles2016-09-291-10/+12
| | | | | | | | Change-Id: I98b745ccb56d89d066508d4195250b1bf446dbc6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29898 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Enable FREQ and CAPS "sensor" sections in poll responseWael El-Essawy2016-09-201-0/+5
| | | | | | | | | | | Populate the "FREQ" and "CAPS" sections with data in the poll response according to the interface spec Change-Id: I65ac8602776f12e796d3c6cae8e49215177f942c RTC: 143442 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29913 Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* Memory Temperature Control Loop (memory throttling)Wael El-Essawy2016-09-161-15/+38
| | | | | | | | | | | | * Memory throttling due to over temp * Throttle when reach timeout getting new temperature readings * Log error for temperature exceeding ERROR threshold Change-Id: I089c88aadba84e7296ad87b8cb87fa8c045ff912 RTC: 131188 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28933 Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* EMPATH Sensor CountersWilliam Bryan2016-08-261-5/+5
| | | | | | | | | | | | RTC:148388 Change-Id: Iae66cd0a73032fa908eb96a149d4163397c2e275 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27781 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Pstate Infrastructure & Support config data required for active stateWael El-Essawy2016-05-251-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | - Support all config data required for active state. - Set 'active ready' bit in poll response when all config data has been received. - Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist. - Put in TODO call PGPE to enable pstates this will also be telling PGPE how to set PMCR mode register (OCC control pstates or OPAL). - Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard codes until PGPE is available. - Call to "proc_pstate_initialize()" moved to state transition to observation - Cleanup proc_freq2pstate() - rewrite amec_slv_freq_smh() - the calls to proc_set_core_bounds() and proc_set_core_pstate() will be replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores or set pstate for all given cores. - Remove all DCM related code. Change-Id: I449d188b2cffc345afca19717dcbea037f159114 RTC:130224 RTC:150935 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Enable Master-slave OCC communicationWael El-Essawy2016-04-051-1/+1
| | | | | | | | | | Change-Id: I445072e20d599e30f80cc8059b3f3b2a956c453e RTC: 133154 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22005 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Implement code to read DIMM temperaturesChris Cain2016-01-271-5/+2
| | | | | | | | | | Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38 RTC: 140093 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
* Enable system config command and sensor listWilliam Bryan2015-12-101-5/+5
| | | | | | | | | | | Added configuration data debug command RTC: 141643 Change-Id: I3d98321508780c25795d66a8d353c36593448a6e Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22549 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Enable set role command and retry APSS initWilliam Bryan2015-12-041-3/+9
| | | | | | | | | | | | | | | Added changes to enable Simics console tracing Enabled memory configuration packet Removed Pstate data config command RTC: 141646 RTC: 142030 Change-Id: I85807a76bb9364b1f3b865fa91c28a3f46446531 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22434 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Remove obsolete failsafe codeWilliam Bryan2015-10-201-2/+0
| | | | | | | | | RTC: 139700 Change-Id: I932fcba9f006138e927d2c1836b09617500e468b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21355 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
* OCC405 Stripped Down and CompilesWilliam Bryan2015-08-071-1/+1
| | | | | | | | Change-Id: Ic5c0536de429106975f5b5b0831c645d6f53e86c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19650 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* new ssx and lib filesWilliam Bryan2015-08-031-0/+394
Change-Id: I2328b1e86d59e3788910687d762fb70ec680058f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19503 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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