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* AVSBus Vdd Current roll over workaroundmbroyles2018-04-161-5/+0
| | | | | | | | | | Change-Id: I795683430112a11e81aae70b5c0704408cc92635 CQ: SW424766 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57161 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Memory Throttle SensorsWilliam Bryan2018-03-271-2/+11
| | | | | | | | | | | RTC:131184 Change-Id: I2582a1eb9d599f700182f17047cc95accad03725 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51407 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Regulator N mode supportmbroyles2018-03-121-0/+3
| | | | | | | | | | | Change-Id: Ieac1aa5e608a7ff778c71363756ac6c5ddeead89 RTC: 166206 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55252 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Handle redundant power supply policyChris Cain2017-12-011-0/+4
| | | | | | | | | | | | | | | | | | | | When redundant power supply policy is disabled: 1. Skip power capping algorithm when in oversubscription 2. No power brake support (don't set the GPIO to enable the automatic HW power braking) 3. Remove clipping to turbo when in oversubscription Initialize frequency votes to prevent throttling when booted in oversubscription. Allow truncated exception buffer data to be parsed. Change-Id: I4fef673feb0a3d0025e00d8fd219cf4cc24d8685 CQ: SW408974 CQ: SW409666 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50071 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* VRM Vdd Thermal Control Loopmbroyles2017-10-261-0/+7
| | | | | | | | | | | Change-Id: Ie5771b33c13cd57822a8b6f1406a92c4516088c0 RTC: 180397 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48563 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Prevent WOF error logs unless wof is formally enabled by (H)TMGTAndres Lugo-Reyes2017-07-061-1/+1
| | | | | | | | | Change-Id: Id6fdb25c8d290ed3452c17536a9c43ca0c0ef0f4 CQ:SW394106 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42768 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Remove time from sensor namesmbroyles2017-06-261-24/+3
| | | | | | | | | Change-Id: Ic6b8892285610985a80c623b6da35d2766926f4d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42161 Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* WOF: More bug fixes and enable wof by defaultAndres Lugo-Reyes2017-06-231-1/+1
| | | | | | | | | | | | | - Hardcode vfrt block size until present in SRAM - Reorder re-enabling wof with mode change - enable wof by default Change-Id: I7f1038397e86c1f443d7f586388f56f2fdcb8a3e RTC:174543 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42159 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Stop State and Throttle Sensor Updatesmbroyles2017-06-161-1/+0
| | | | | | | | Change-Id: Ic2589a9e3fb5bad67ce85fb7a5f2c3e9af9f5047 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41887 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Shawn M. McCarney <shawnmm@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* WOF: Implement wof debug commandsAndres Lugo-Reyes2017-05-311-0/+4
| | | | | | | | | | | | -Command to set/clear bits in wof_disabled -Command to hexdump g_amec->wof -Purge some unused debug commands Change-Id: Ib738f804863e9ab59625fe95569d76a6bcb0ecab Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40655 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Witherspoon pstate updatesChris Cain2017-05-151-2/+2
| | | | | | | | | | | | | | - Adjust fmax on slave to account for diff freq - Remove SIMICS_FLAG_ISSUE (automic registers not working in simics) - Cleanup traces Change-Id: Ifc30333463bc5a1e44ec81bd365860460b802e71 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40461 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Memory Power Control when entering and exiting IPS (Idle Power Save)Wael El-Essawy2017-05-101-0/+3
| | | | | | | | | | | | | | | memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* OCC: Non-GPU Sensors to main memory: Phase 1Shawn McCarney2017-04-271-10/+10
| | | | | | | | | | | | | | | | | | | | Performed the following sensor renames required by this RTC story: FREQA4MSP0Cy -> FREQACy UTIL4MSP0Cy -> UTILCy PWR250US -> PWRSYS PWR250USP0 -> PWRPROC Also renamed the following related symbols: * Associated sensor_t field names in the amec_sys_t data structure * Mini-sensor field names * Parent sensors that contain a vector iterating over renamed sensors Change-Id: I1e9e17661e5730ed6309fc7617c61bd973d2e44f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39772 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Miscellaneous AMEC TODO CleanupWilliam Bryan2017-03-131-6/+4
| | | | | | | | | | Change-Id: I8b78383bc9c6ae992be734d51f20a640cd93d465 RTC:163356 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37490 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Implement task_poke_watchdogsWael El-Essawy2016-11-031-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both master and slaves while in observation and active state and do the following: 1. Every time called: Enable/Reset the OCC heartbeat: done by a write to OCB OCC Heartbeat Register (set count to 8ms) 2. Every time called: Reset memory deadman timer for 1 MCA (skip if not present and just wait until next call to check next MCA to keep same timing of reset per MCA regardless of # present) Resetting the deadman is done by reading one of the memory performance counters, use one at SCOM offset 0x13C. NOTE: Will take 16ms (8 MCAs x 2ms) to reset all memory timers, this is fine since the shortest time the deadman timeout can be configured to is 28ms 3. Every 4ms (on tick 1 only) : Verify PGPE is still functional by reading PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no change to the PGPE Beacon count then log an error and request reset. In addition, this commit adds entries for the PGPE image header and shared SRAM in the TLB, and partially reads PGPE image header parameters. Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39 RTC: 154960 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Save Core & Quad DTS AvgsWilliam Bryan2016-10-111-7/+7
| | | | | | | | | | Change-Id: I7c57c072f4f84f02ce7bbc5f95c80a4901d6c9a2 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30180 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Collect Nest DTS AverageWilliam Bryan2016-09-291-1/+1
| | | | | | | | | | RTC:133842 Change-Id: I565a6f2e848652b7eddd3b319f9c3a411913074a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29804 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable power capping and oversubscription. RTC:137621 RTC:133156mbroyles2016-09-291-0/+4
| | | | | | | | Change-Id: I98b745ccb56d89d066508d4195250b1bf446dbc6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29898 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Enable FW Timing SensorsWael El-Essawy2016-09-231-24/+18
| | | | | | | | | | | Enable scheduling of the GPE NOP task to do GPE timings and verify all sensors being updated in amec_update_fw_sensors() are being populated correctly. Change-Id: I623dd7518be9a8736e601c7d2fa748097a4d773a RTC: 141299 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29849 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Enable FREQ and CAPS "sensor" sections in poll responseWael El-Essawy2016-09-201-2/+0
| | | | | | | | | | | Populate the "FREQ" and "CAPS" sections with data in the poll response according to the interface spec Change-Id: I65ac8602776f12e796d3c6cae8e49215177f942c RTC: 143442 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29913 Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* EMPATH Sensor CountersWilliam Bryan2016-08-261-29/+29
| | | | | | | | | | | | RTC:148388 Change-Id: Iae66cd0a73032fa908eb96a149d4163397c2e275 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27781 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Checkpoint improvementsChris Cain2016-08-251-1/+1
| | | | | | | | | Change-Id: I08d76ac1db6e425a9690864f693f36cb848cead5 RTC: 153965 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28188 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Processor Thermal Control LoopWael El-Essawy2016-06-131-4/+2
| | | | | | | | | | | | | | | | | | | Enable processor thermal control loop. Enable frequency votes due to thermal and error reading temperatures. Verify The following: *Error log generation when a proc reaches Error limit *Reach throttle points when: -- Processor reached over temperature limit -- Processor temperature sensors timeout enable transition to active mode Change-Id: Iae24f64a872e031e1cf93ff0d9248d3fa3847ed7 RTC: 130210 RTC: 133942 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25458 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Enable Slave DTS calculation and sensor update.Fadi Kassem2015-11-251-8/+8
| | | | | | | | Change-Id: I0feb572e650322326ce9a6c7b2affd9e58cd6b8d RTC:140183 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22303 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: Wael Elessawy <welessa@us.ibm.com>
* Enable Sensor supportWael El-Essawy2015-11-111-2/+17
| | | | | | | | | | | | | | add necessary sensor, amec, and other files to the build list. add the task_amec_slave to the rtls tick tables modify the gpe request structures to reflect the new P9 design enrich the .dis files contects for better debugging Change-Id: Iae39bb1c430da56310478c24a28aad6dfbc6d6d9 RTC: 133865 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21789 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* new ssx and lib filesWilliam Bryan2015-08-031-0/+436
Change-Id: I2328b1e86d59e3788910687d762fb70ec680058f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19503 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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