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* Initial 405 GPU supportmbroyles2017-08-141-1/+2
| | | | | | | Change-Id: I6e957ca1aa643d257274e99957df5b15ac8c889b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44254 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Pstates Support in OCCWael El-Essawy2017-01-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin, G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter Block) 2. When frequency config data packet is received and OCC is NOT already in Active state: Send IPC command to PGPE to set pState clips to be wide open from min frequency to turbo First verify min/max frequency from TMGT is within what PGPE allows saved in G_proc_fmax and G_proc_fmin if not within bounds trace and clip to G_proc_fmax/fmin) 3. Transition to active state: Send IPC command to PGPE to start pState protocol (give correct data for OCC vs OPAL in control of Pstates) and if OPAL system update OPAL shared memory with Pstate information. 4. amec_slv_freq_smh(): Send IPC command to PGPE to set requested pState (PowerVM) or set clips (OPAL). 5. Address all the TODO/TEMP/#if 0 in amec_freq.c either remove or add RTC# for when it will be addressed Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd RTC: 130201 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Initial Wof commitAndres Lugo-Reyes2017-01-061-1/+2
| | | | | | | | | | | Contains initial WOF directory structure Change-Id: I24ec77ca11dc711ff44c0b378f64d96696838ee1 RTC:130216 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34298 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Changes for GCC 4.9 and OPWilliam Bryan2016-10-241-10/+4
| | | | | | | | Change-Id: I95ddff4b290fcf3eab617a674afc489698c78a1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31563 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Sensor List Checking & Make ImprovementsWilliam Bryan2016-10-141-6/+12
| | | | | | | | | | Change-Id: Id75021aeeb75c8d63b85e8a80bf09646b8bcf215 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30752 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Save Core & Quad DTS AvgsWilliam Bryan2016-10-111-0/+1
| | | | | | | | | | Change-Id: I7c57c072f4f84f02ce7bbc5f95c80a4901d6c9a2 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30180 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Memory Temperature Control Loop (memory throttling)Wael El-Essawy2016-09-161-1/+2
| | | | | | | | | | | | * Memory throttling due to over temp * Throttle when reach timeout getting new temperature readings * Log error for temperature exceeding ERROR threshold Change-Id: I089c88aadba84e7296ad87b8cb87fa8c045ff912 RTC: 131188 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28933 Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* Update build process for OpenPOWERWilliam Bryan2016-08-261-1/+1
| | | | | | | | | | Change-Id: I0852869bdc9d527c54112de7223b6e95111c750a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28741 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Delete unused files, update PK, and use new compilersWilliam Bryan2016-07-291-0/+8
| | | | | | | | Change-Id: I9e4951a2cebd204d1ea752c63e3f2b532ad3a2db Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27465 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Implement I2C locking with hostChris Cain2016-03-011-0/+1
| | | | | | | | | | Change-Id: I9e99e799e0df442bebef473360ca87d564f5ddaf RTC: 140545 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/12898 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Changed poll response to version 0x20William Bryan2016-01-271-2/+3
| | | | | | | | | RTC: 143441 Change-Id: Ib964b5f8d8b00029971935ffc8eb957975dc6cce Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23406 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Implement code to read DIMM temperaturesChris Cain2016-01-271-0/+1
| | | | | | | | | | Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38 RTC: 140093 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
* Enable the poll and data configuration commandsWilliam Bryan2015-11-161-1/+2
| | | | | | | | | RTC: 140898 Change-Id: If9ef2233a631bb857a095746b095a06092e4aff0 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21976 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Enable Sensor supportWael El-Essawy2015-11-111-0/+3
| | | | | | | | | | | | | | add necessary sensor, amec, and other files to the build list. add the task_amec_slave to the rtls tick tables modify the gpe request structures to reflect the new P9 design enrich the .dis files contects for better debugging Change-Id: Iae39bb1c430da56310478c24a28aad6dfbc6d6d9 RTC: 133865 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21789 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Remove applet supportWilliam Bryan2015-10-271-3/+3
| | | | | | | | | | | | | | 1. Removed most files related to applets 2. Converted sensor query list and command handler debug applets to functions. 3. Removed #includes of applet header files Change-Id: I410b3c68991e4fa6a7f542e5ee346a3d313f2a94 RTC: 137992 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21030 Tested-by: FSP CI Jenkins Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* tracepp Makefile fixWilliam Bryan2015-08-311-1/+4
| | | | | | | | | Change-Id: I03b1b092362803b055f2175cd98bf6559abd1acd Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20210 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Enable tracingWilliam Bryan2015-08-271-0/+3
| | | | | | | | | | | | | | I've reverted the way we trace from SSX_TRACE to the P8 way More useful way of compiling for Simics vs HW RTC: 133155 Change-Id: I7ac3ce9ad71e36de0cf0050f14ff3d2423c9f75f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20113 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enabled FFDC and SimicsWilliam Bryan2015-08-261-6/+7
| | | | | | | | | | | | | | | | Also included: -- Some more cmdh files into the build -- Workaround for OCB Timer divider register in Simics -- Workaround to start APSS tasks until DCOM is back RTC: 133819 Change-Id: Ie19c2a544f64c40126c2bc4a0af6fabfe6430d21 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19998 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC405 Stripped Down and CompilesWilliam Bryan2015-08-071-64/+90
| | | | | | | | Change-Id: Ic5c0536de429106975f5b5b0831c645d6f53e86c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19650 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* new ssx and lib filesWilliam Bryan2015-08-031-0/+91
Change-Id: I2328b1e86d59e3788910687d762fb70ec680058f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19503 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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