Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Processor Thermal Control Loop | Wael El-Essawy | 2016-06-13 | 1 | -1/+1 |
* | Pstate Infrastructure & Support config data required for active state | Wael El-Essawy | 2016-05-25 | 1 | -1/+1 |
* | Empath counters collection PPE code | Wael El-Essawy | 2016-05-03 | 2 | -106/+63 |
* | Enable Master-slave OCC communication | Wael El-Essawy | 2016-04-05 | 3 | -1541/+1268 |
* | Implement I2C locking with host | Chris Cain | 2016-03-01 | 1 | -68/+24 |
* | Implement code to read DIMM temperatures | Chris Cain | 2016-01-27 | 1 | -2/+4 |
* | OCC GPE0: HWP to read Core/Quad DTS | Wael El-Essawy | 2016-01-19 | 1 | -32/+16 |
* | Update Proc Core sensors in amec_slv_states for 24 cores | Wael El-Essawy | 2015-12-04 | 1 | -1/+0 |
* | Enable Slave DTS calculation and sensor update. | Fadi Kassem | 2015-11-25 | 1 | -0/+2 |
* | OCC GPE0: Core Data Collection infrastructure in GPE0 | Wael El-Essawy | 2015-11-23 | 2 | -0/+42 |
* | Adding structures for core data collection | William Bryan | 2015-11-17 | 2 | -0/+269 |
* | new include dir | mbroyles | 2015-08-03 | 25 | -0/+22853 |